Active matrix substrate and liquid crystal display panel including the same

Patent metadata

Field	Value
Publication number	US-9341903-B2
Application number	US-201214367965-A
Country	US
Kind code	B2
Filing date	Dec 19, 2012
Priority date	Dec 26, 2011
Publication date	May 17, 2016
Grant date	May 17, 2016

Abstract

An auxiliary capacitor ( 6 ) of each of sub-pixels (P) includes a transparent electrode, a pixel electrode, and a capacitor insulating film between the transparent electrode and the pixel electrode. Switching elements ( 5 a ) are connected, for every predetermined sub-pixel(s) (P) along a column direction of the sub-pixels (P) arranged in rows and columns, to the source lines ( 15 a ) different from each other. A plurality of transparent electrodes are each shared by a pair of the sub-pixels (P) which are adjacent to each other in a predetermined direction and are arranged in a corresponding one of the wide spaces each provided between adjacent two of gate lines ( 13 ). The transparent electrodes adjacent to each other in the row direction receive different signals.

First claim

The invention claimed is:

1. An active matrix substrate comprising:
a plurality of sub-pixels arranged in rows and columns;
a plurality of gate lines each two of which are arranged in every other space extending in a row direction between the sub-pixels such that the gate lines extend parallel to each other with narrow spaces and wide spaces being alternately provided therebetween;
a plurality of source lines each of which is provided in a corresponding one of spaces extending in a column direction between the sub-pixels such that the source lines extend parallel to each other;
a plurality of switching elements
each of which is provided at a corresponding one of intersections of the gate lines and the source lines, and
which are connected, for each pair of the sub-pixels, to the source lines different from each other, the sub-pixels in the pair being adjacent to each other in the column direction and being arranged in a corresponding one of the wide spaces each provided between adjacent two of the gate lines along the column direction;

a protective insulating film covering the switching elements,
a plurality of transparent electrodes provided on the protective insulating film such that each transparent electrode is shared by a pair of the sub-pixels which are adjacent to each other in the column direction and are arranged in a corresponding one of the wide spaces each provided between adjacent two of the gate lines, wherein the transparent electrodes adjacent to each other in the row direction receive different signals;
a capacitor insulating film covering the transparent electrodes, and
a plurality of pixel electrodes arranged in rows and columns on the capacitor insulating film and each connected to a corresponding one of the switching elements.

2. An active matrix substrate of claim 1 , further comprising:
capacitor lines each provided in corresponding one of the narrow spaces each provided between adjacent two of the gate lines, wherein
the transparent electrodes, each of which is shared by the pair of sub-pixels and which are adjacent to each other in the row direction, are connected to the capacitor lines different from each other.

3. The active matrix substrate of claim 2 , wherein
each capacitor line is in contact with corresponding ones of the transparent electrodes.

4. The active matrix substrate of claim 2 , wherein
the capacitor lines are fewer than the gate lines.

5. The active matrix substrate of claim 2 , wherein
y=x/ 2+1
where y represents a quantity of the capacitor lines, x represents a quantity of the gate lines, and x is an even number.

6. The active matrix substrate of claim 2 , wherein
y=x/ 2+1.5
where y represents a quantity of the capacitor lines, x represents a quantity of the gate lines, and x is an odd number.

7. A liquid crystal display panel comprising:
the active matrix substrate of claim 2 ;
a counter substrate facing the active matrix substrate; and
a liquid crystal layer between the active matrix substrate and the counter substrate, wherein
the liquid crystal display panel is configured such that signals input to the source lines have different polarities for every other line, and the polarities are unchanged within one vertical period.

8. The liquid crystal display panel of claim 7 , wherein
each capacitor receives a voltage having a high electric potential or a voltage having a low electric potential with a reception timing being shifted by two horizontal periods sequentially in an order of arrangement of the capacitor lines such that the capacitor lines receiving the voltage having the high electric potential and the capacitor lines receiving the voltage having the low electric potential are alternately arranged.

9. The active matrix substrate of claim 1 , wherein
each switching element is a thin film transistor.

10. The active matrix substrate of claim 9 , wherein
the thin film transistor has a top gate structure.

11. The active matrix substrate of claim 9 , wherein
the thin film transistor has a bottom gate structure.

12. A liquid crystal display panel, comprising:
the active matrix substrate of claim 1 ;
a counter substrate facing the active matrix substrate; and
a liquid crystal layer between the active matrix substrate and the counter substrate.

13. An active matrix substrate comprising:
a plurality of sub-pixels arranged in rows and columns;
a plurality of gate lines each two of which are arranged in every other space extending in a row direction between the sub-pixels such that the gate lines extend parallel to each other with narrow spaces and wide spaces being alternately provided therebetween;
a plurality of source lines each of which is provided in a corresponding one of spaces extending in a column direction between the sub-pixels such that the source lines extend parallel to each other;
a plurality of switching elements
each of which is provided at a corresponding one of intersections of the gate lines and the source lines, and
which are connected, for each sub-pixel along the column direction, to the source lines different from each other;

a protective insulating film covering the switching elements;
a plurality of transparent electrodes provided on the protective insulating film such that each transparent electrode is shared by a pair of the sub-pixels which are adjacent to each other in a diagonal direction of the sub-pixels and are arranged in a corresponding one of the wide spaces each provided between adjacent two of the gate lines, wherein the transparent electrodes adjacent to each other in the row direction receive different signals;
a capacitor insulating film covering the transparent electrodes; and
a plurality of pixel electrodes arranged in rows and columns on the capacitor insulating film and each connected to a corresponding one of the switching elements.

14. An active matrix substrate of claim 13 , further comprising:
capacitor lines each provided in corresponding one of the narrow spaces each provided between adjacent two of the gate lines, wherein
the transparent electrodes, each of which is shared by the pair of sub-pixels and which are adjacent to each other in the row direction, are connected to the capacitor lines different from each other.

15. The active matrix substrate of claim 14 , wherein
each capacitor line is in contact with corresponding ones of the transparent electrodes.

16. A liquid crystal display panel comprising:
the active matrix substrate of claim 14 ;
a counter substrate facing the active matrix substrate; and
a liquid crystal layer between the active matrix substrate and the counter substrate, wherein
the liquid crystal display panel is configured such that signals input to the source lines have different polarities for every other line, and the polarities are unchanged within one vertical period.

17. The active matrix substrate of claim 13 , wherein
each switching element is a thin film transistor.

18. The active matrix substrate of claim 17 , wherein
the thin film transistor has a top gate structure.

19. The active matrix substrate of claim 17 , wherein
the thin film transistor has a bottom gate structure.

20. A liquid crystal display panel, comprising:
the active matrix substrate of claim 13 ;
a counter substrate facing the active matrix substrate; and
a liquid crystal layer between the active matrix substrate and the counter substrate.

Assignees

• Sharp Kk

Inventors

• Nakano Fumiki
• Miyamoto Tadayoshi

Classifications

• H10D86/481

  integrated with passive devices, e.g. auxiliary capacitors · CPC title

• H10D86/441

  Interconnections, e.g. scanning lines · CPC title

• H10D86/60

  wherein the TFTs are in active matrices · CPC title

• G02F1/136213

  Storage capacitors associated with the pixel electrode · CPC title

• G02F1/1368

  in which the switching element is a three-electrode device {(G02F1/136277 takes precedence)} · CPC title