Automatic compilation method and framework for generating a layout of integrated memory-compute circuit
US-2024403527-A1 · Dec 5, 2024 · US
US10216876B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10216876-B2 |
| Application number | US-201514828686-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 18, 2015 |
| Priority date | Aug 18, 2014 |
| Publication date | Feb 26, 2019 |
| Grant date | Feb 26, 2019 |
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A method of designing a semiconductor circuit using a circuit simulation tool executed by a computer includes calculating power consumptions of elements of the semiconductor circuit by use of the circuit simulation tool. A thermal netlist is created about the semiconductor circuit, based on the power consumptions and geometry information of each of the elements. A simulation of the semiconductor circuit is performed with the thermal netlist using the circuit simulation tool to detect a temperature of each of the elements. The thermal netlist includes thermal capacitance information of each of the elements.
Opening claim text (preview).
What is claimed is: 1. A method, executed by a computer, of designing a semiconductor circuit using a circuit simulation tool, the method comprising: applying the circuit simulation tool to an electric netlist in a first simulation of the semiconductor circuit's operation to calculate power consumptions of elements of the semiconductor circuit; creating a thermal netlist about the semiconductor circuit, based on the power consumptions and geometry information of each of the elements, by replacing an electrical resistance of each of the elements within the electric netlist with a thermal resistance or a thermal capacitance; applying the circuit simulation tool to the thermal netlist in a second simulation of the semiconductor circuit's operation to detect a temperature of each of the elements during the second simulation of the semiconductor circuit's operation; generating a revised electric netlist of the semiconductor circuit by revising the electric netlist based on the temperature of each of the elements of the semiconductor circuit; applying the circuit simulation tool to the revised electric netlist in a third simulation of the semiconductor circuit's operation to determine a simulation result of the semiconductor circuit's operation with respect to both the power consumptions and temperatures of the elements of the semiconductor circuit; and modifying the semiconductor circuit, based upon the simulation result, to create a modified semiconductor circuit having improved performance with respect to self-heating than the semiconductor circuit, wherein the thermal netlist includes thermal capacitance information of each of the elements. 2. The method of claim 1 , further comprising: replacing the electrical resistance of at least one of the elements of the electric netlist with the thermal resistance, wherein the thermal resistance is determined based on geometry information and material characteristic information of the at least one element. 3. The method of claim 2 , further comprising: replacing the electrical resistance of at least one other of the elements of the electric netlist with the thermal capacitance, wherein the thermal capacitance is determined based on a value of the thermal resistance for the at least one other element and a time constant. 4. The method of claim 1 , wherein in creating the thermal netlist, the power consumptions are provided as a power parameter of the thermal netlist. 5. The method of claim 1 , wherein in detecting the temperature, the circuit simulation tool indicates a temperature of each of nodes constituting an electrical circuit with a voltage output value of each of nodes constituting a thermal circuit. 6. A method of designing a semiconductor circuit using a circuit simulation tool executed by an information processing device, the method comprising: receiving a first netlist of the semiconductor circuit, material information of elements included in the semiconductor circuit, and geometry information of the elements included in the semiconductor circuit; conducting a first simulation of the semiconductor circuit's operation with the first netlist using the circuit simulation tool; creating a second netlist, corresponding to a thermal circuit representation of the semiconductor circuit depending on at least one of power consumptions of the elements generated according to the first simulation, the material information and the geometry information, by replacing an electrical resistance of each of the elements within the first netlist with a thermal resistance or a thermal capacitance; performing a second simulation of the semiconductor circuit's operation with the second netlist using the circuit simulation tool to detect temperature variations of the elements; revising the first netlist based on the temperature variations to create a third netlist; performing a third simulation of the semiconductor circuit's operation with the third netlist using the circuit simulation tool to determine a simulation result of the semiconductor circuit's operation with respect to both the temperature variations of the elements of the semiconductor circuit and at least one of the power consumptions of the elements, the material information, and the geometry information; and modifying the semiconductor circuit, based upon the simulation result, to create a modified semiconductor circuit having improved performance with respect to self-heating than the semiconductor circuit, wherein the thermal circuit representation includes a thermal capacitance parameter for detecting the temperature variations of the elements dynamically. 7. The method of claim 6 , wherein the first netlist and the third netlist correspond to an electrical circuit of the semiconductor circuit. 8. The method of claim 6 , wherein in creating the second netlist, a transistor is modeled with a source node, a channel node, a drain node, a gate node, and either at least one thermal resistance or at least one thermal capacitance connecting bulk nodes. 9. The method of claim 8 , wherein: a first thermal resistance and a first thermal capacitance are connected in parallel between the channel node and the source node, and a second thermal resistance and a second thermal capacitance are connected in parallel between the channel node and the drain node. 10. A method, executed by a computer running a simulation program, of simulating an electrical circuit, the method comprising: simulating an electrical operation of the electrical circuit, using an electrical representation of the electrical circuit, to identify a power dissipation of each of a plurality of elements of the electrical circuit; generating a thermal representation of each of the elements, based on the power dissipation of each of the elements and characteristics of the elements, by replacing an electrical resistance of each of the elements within the electrical representation of the electrical circuit with a thermal resistance or a thermal capacitance; simulating a thermal operation of the electrical circuit based on the thermal representation of each of the elements and the power dissipation of each of the elements; generating a temperature characteristic for each of the elements based upon the simulation of the thermal operation; simulating another electrical operation of the electrical circuit using the electrical representation of the electrical circuit and the temperature characteristics of the elements; identifying a performance degradation of one or more of the elements from the simulation of the other electrical operation of the electrical circuit using the electrical representation of the electrical circuit and the temperature characteristics of the elements; and modifying the electrical circuit, based upon the performance degradation, to create a modified electrical circuit having improved performance with respect to self-heating than the electrical circuit. 11. The method of claim 10 , wherein the thermal representation of each of the elements comprises a thermal resistance that indicates a temperature difference across the element for the power dissipation through the element. 12. The method of claim 11 , wherein: the thermal representation of each of the elements further comprises a thermal capacitance, wherein the thermal capacitance and the thermal resistance indicate a variation of the temperature difference with time. 13. The method of claim 10 , wherein the thermal operation is simulated by substituting the thermal representation of each of the elements for an electrical representation of the element in a repetition of simulating the electrical operation.
Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods · CPC title
Thermal analysis or thermal optimisation · CPC title
Physics · mapped topic
Physics · mapped topic
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