Caching methods and systems using a network interface card

Patent metadata

Field	Value
Publication number	US-10216666-B2
Application number	US-201514830045-A
Country	US
Kind code	B2
Filing date	Aug 19, 2015
Priority date	Nov 4, 2014
Publication date	Feb 26, 2019
Grant date	Feb 26, 2019

Abstract

A computing device having a host memory and a host processor for executing instructions out of the host memory; and a network interface card interfacing with the computing device are provided. When there is a cache hit for a read request, the network interface card processes the read request by obtaining data stored from one or both of the host memory and a storage device that the network interface card accesses without involving the host processor and when there are is a cache miss, then the read request is processed by the host processor.

First claim

What is claimed is:

1. A machine implemented method, comprising:
maintaining a cache entry data structure for storing a sync word associated with a cache entry that points to a storage location at a storage device accessible to a network interface card (NIC) via a peripheral link, the peripheral link couples the NIC, the storage device and a processor of a computing device; wherein the sync word is associated with a plurality of states that are used by the NIC and a caching module executed by the processor of the computing device for processing requests to transmit data cached at the storage device by the NIC using a network link; wherein the plurality of states are an add state, a remove state and a valid state that are updated by the NIC by setting bits associated with each of the plurality of states;
using the cache entry data structure by the NIC to determine that there is a cache hit indicating that data for a read request is cached at the storage device;
posting a first message for the storage device by the NIC via the peripheral link, at a storage device queue located at a host memory of the computing device, the message requesting the data for the read request from the storage device;
in response to the first message, placing the data for the read request for the NIC by the storage device at the host memory via the peripheral link;
posting a second message for the NIC by the storage device at the host memory via the peripheral link for notifying the NIC that the data for the read request has been placed at the host memory;
retrieving the data placed by the storage device at the host memory by the NIC via the peripheral link;
transmitting the data for the read request by the NIC to via the network link; and
updating by the NIC, a state of a cache entry associated with the read request at the cache entry data structure.

2. The method of claim 1 , wherein the cache entry for the read request is locked by an atomic operation that sets an add bit of the sync word.

3. The method of claim 2 , wherein after the add bit is set, a valid bit of the sync word is set indicating that the cache entry for the read request is locked for use.

4. The method of claim 2 , wherein a remove bit of the sync word is set after an associated task for the cache entry for the read request is completed.

5. The method of claim 1 , wherein the sync word includes a usage counter that is increased when a task is assigned to the cache entry for the read request and decreased when the task is completed.

6. The method of claim 1 , wherein the sync word includes an overflow bit which is set when the cache entry for the read request is being used by a plurality of tasks.

7. A non-transitory, machine readable storage medium having stored thereon instructions for performing a method, comprising machine executable code which when executed by at least one machine, causes the machine to:
maintain a cache entry data structure for storing a sync word associated with a cache entry that points to a storage location at a storage device accessible to a network interface card (NIC) via a peripheral link, the peripheral link couples the NIC, the storage device and a processor of a computing device; wherein the sync word is associated with a plurality of states that are used by the NIC and a caching module executed by the processor of the computing device for processing requests to transmit data cached at the storage device by the NIC using a network link; wherein the plurality of states are an add state, a remove state and a valid state that are updated by the NIC by setting bits associated with each of the plurality of states;
use the cache entry data structure by the NIC to determine that there is a cache hit indicating that data for a read request is cached at the storage device;
post a first message for the storage device by the NIC via the peripheral link, at a storage device queue located at a host memory of the computing device, the message requesting the data for the read request from the storage device;
in response to the first message, place the data for the read request for the NIC by the storage device at the host memory via the peripheral link;
post a second message for the NIC by the storage device at the host memory via the peripheral link for notifying the NIC that the data for the read request has been placed at the host memory;
retrieve the data placed by the storage device at the host memory by the NIC via the peripheral link;
transmit the data for the read request a destination via the network link; and
updating by the NIC, a state of a cache entry associated with the read request at the cache entry data structure.

8. The storage medium of claim 7 , wherein the cache entry for the read request is locked by an atomic operation that sets an add bit of the sync word.

9. The storage medium of claim 8 , wherein after the add bit is set, a valid bit of the sync word is set indicating that the cache entry for the read request is locked for use.

10. The storage medium of claim 8 , wherein a remove bit of the sync word is set after an associated task for the cache entry for the read request is completed.

11. The storage medium of claim 7 , wherein the sync word includes a usage counter that is increased when a task is assigned to the cache entry for the read request and decreased when the task is completed.

12. The storage medium of claim 7 , wherein the sync word includes an overflow bit which is set when the cache entry for the read request is being used by a plurality of tasks.

13. A system, comprising:
a computing device having a host memory, a storage device, and a host processor for executing instructions out of the host memory; and
a network interface card interfacing with the computing device and the storage device via a peripheral link, wherein when there is a cache hit for a read request to transmit data by the network interface card to a destination, the network interface card posts a first message for the storage device via the peripheral link at a storage device queue at the host memory requesting data for the read request, in response to the first message, the storage device places the data at the host memory via the peripheral link and the storage device posts a second message for the network interface card via the peripheral link, notifying the network interface card that data has been placed; and wherein, in response to the second message, the network interface card retrieves the data from the host memory via the peripheral link; updates a state of a cache entry associated with the read request at a cache entry data structure and transmits the data to the destination; wherein the state is from a plurality of states that include an add state, a remove state and a valid state that are updated by the NIC by setting bits associated with each of the plurality of states; and
when there are is a cache miss indicating that the data is not located at the storage device, then the read request to transmit the data to the destination is first processed by the host processor by updating a scatter gather list indicating a location of the data, the network interface card retrieves the data using the scatter gather list and then the data is transmitted by the network interface card to its destination.

14. The system of claim 13 , wherein a driver executed by the host processor performs an operation that is not offloaded to the network interface card.

15. The system of claim 13 , wherein an application programming interface obtains statistics from the network interface card that is used for selecting operations that are offloaded to the net

Assignees

• Qlogic Corp
• Cavium Llc

Inventors

• Shalom Rafi
• Goren Nir

Classifications

• G06F13/32 Primary

  using combination of interrupt and burst mode transfer · CPC title

• H04L67/1097 Primary

  for distributed storage of data in networks, e.g. transport arrangements for network file system [NFS], storage area networks [SAN] or network attached storage [NAS] · CPC title

• G06F13/128

  for dedicated transfers to a network (for protocol converters G06F13/387) · CPC title

• G06F2206/1014

  One time programmable [OTP] memory, e.g. PROM, WORM · CPC title

• Y02D10/14

  Cross-Sectional Technologies · mapped topic