Circuits and techniques for improving regulation in a regulator having more than one mode of operation
US-9621036-B2 · Apr 11, 2017 · US
US10211729B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10211729-B2 |
| Application number | US-201715469713-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 27, 2017 |
| Priority date | Aug 26, 2016 |
| Publication date | Feb 19, 2019 |
| Grant date | Feb 19, 2019 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
A control circuit in a switching regulator, the switching regulator including an inductor and a switching circuit configured to control a current passing through the inductor in response to a control signal, the control circuit configured to receive a feedback voltage of an output voltage of the switching regulator and receive the current passing through the inductor as a current sensing signal. The control circuit includes a first internal signal generator configured to generate a first internal signal based on the feedback voltage and a reference voltage, a second internal signal generator configured to generate a second internal signal based on the current sensing signal such that a base level of the second internal signal varies according to the feedback voltage and the reference voltage, and a comparator configured to output the control signal based on the first and second internal signals.
Opening claim text (preview).
What is claimed is: 1. A control circuit in a switching regulator, the switching regulator including an inductor and a switching circuit configured to control a current passing through the inductor in response to a control signal, the control circuit configured to receive a feedback voltage of an output voltage of the switching regulator and receive the current passing through the inductor as a current sensing signal, the control circuit comprising: a first internal signal generator configured to generate a first internal signal based on the feedback voltage and a reference voltage; a second internal signal generator configured to generate a second internal signal based on the current sensing signal such that a base level of the second internal signal varies according to the feedback voltage and the reference voltage; and a comparator configured to output the control signal based on the first and second internal signals, wherein the second internal signal generator includes, a first amplifier having a first non-inverting input terminal configured to receive the feedback voltage and a first inverting input terminal configured to receive the reference voltage, the first amplifier configured to output an error signal based on the feedback voltage and the reference voltage, and a summing circuit configured to generate the second internal signal by summing the current sensing signal with the error signal, the summed signal being the second internal signal. 2. The control circuit of claim 1 , wherein the first internal signal generator comprises: a second amplifier having a second inverting input terminal configured to receive the feedback voltage and a second non-inverting input terminal configured to receive the reference voltage, the second amplifier configured to output the first internal signal based on the feedback voltage and the reference voltage. 3. The control circuit of claim 1 , wherein the summing circuit is configured to generate the second internal signal by further summing the current sensing signal, the error signal, and a direct current (DC) bias signal such that the sum of the DC bias signal, the current sensing signal, and the error signal is within an input range of the comparator. 4. The control circuit of claim 1 , wherein the summing circuit is configured to further sum the current sensing signal, the error signal, and a saw-toothed ramp signal, a level of the saw-toothed ramp signal increases during a switching period of the switching circuit. 5. The control circuit of claim 4 , wherein the saw-toothed ramp signal has a DC offset such that the sum of the current sensing signal, the saw-toothed ramp signal and the error signal is within an input range of the comparator. 6. The control circuit of claim 4 , wherein the summing circuit comprises: a first summing sub-circuit configured to sum the current sensing signal with the saw-toothed ramp signal; a level shifter configured to shift a DC level of an output signal of the first summing sub-circuit such that a sum of the output signal of the first summing sub-circuit and the error signal is within an input range of the comparator; and a second summing sub-circuit configured to generate the second internal signal by summing an output signal of the level shifter with the error signal. 7. The control circuit of claim 6 , wherein the first summing sub-circuit is a current summing sub-circuit, and the summing circuit further includes, a current-voltage converter configured to convert a current of the output signal of the first summing sub-circuit into a voltage, and the level shifter is configured to shift a DC level of an output signal of the current-voltage converter. 8. The control circuit of claim 1 , wherein the second internal signal generator further comprises: a level shifter configured to shift a DC level of the error signal such that the sum of the current sensing signal and the error signal is within an input range of the comparator, wherein the summing circuit is configured to sum the current sensing signal with an output signal of the level shifter. 9. The control circuit of claim 1 , wherein the inductor has a first end configured to receive an input voltage and a second end coupled to the switching circuit, and the switching regulator is a boost converter and the switching regulator further includes, a rectifier having a first end coupled to the second end of the inductor and a second end configured to output the output voltage, and a capacitor and a resistor coupled in series between the second end of the rectifier and ground. 10. A switching regulator comprising: an inductor; a feedback signal generating circuit configured to generate a feedback voltage from an output voltage of the switching regulator and to generate a current sensing signal based on a current passing through the inductor; a control circuit configured to generate a control signal based on the feedback voltage and the current sensing signal; and a switching circuit configured to control the current passing through the inductor in response to the control signal, wherein the control circuit includes, a first internal signal generator configured to generate a first internal signal based on the feedback voltage and a reference voltage, a second internal signal generator configured to generate a second internal signal based on the current sensing signal such that a base level of the second internal signal varies according to the feedback voltage and the reference voltage, and a comparator configured to output the control signal based on the first and second internal signals, and the second internal signal generator is configured to generate the second internal signal by summing an error signal with the current sensing signal, the error signal being an amplified difference between the feedback voltage and the reference voltage, and the summed signal being the second internal signal. 11. The switching regulator of claim 10 , wherein the first internal signal generator is configured to output the first internal signal by amplifying a difference between the reference voltage and the feedback voltage. 12. The switching regulator of claim 10 , wherein the second internal signal generator is configured to further sum the error signal and the current sensing signal with a DC bias signal, such that the sum of the DC bias signal, the current sensing signal, and the error signal is within an input range of the comparator. 13. The switching regulator of claim 10 , wherein the second internal signal generator is configured to further sum the error signal and the current sensing signal with a saw-toothed ramp signal, a level of the saw-toothed ramp signal increases during a switching period of the switching circuit. 14. The switching regulator of claim 13 , wherein the saw-toothed ramp signal has a DC offset such that the sum of the current sensing signal, the saw-toothed ramp signal and the error signal is within an input range of the comparator. 15. The switching regulator of claim 13 , wherein the second internal signal generator is configured to sum the current sensing signal and the saw-toothed ramp signal and shift a DC level of the summed current sensing and saw-toothed ramp signal and sum the level-shifted signal with the error signal such that the second internal signal is within an input range of the comparator. 16. The switching regulator of claim 10 , wherein the second internal signal generator is configured to generate the second internal signal by shifting a DC level of the error signal such that the second internal
with automatic control of output voltage or current, e.g. switching regulators · CPC title
Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters · CPC title
Electricity · mapped topic
with means for compensating against rapid load changes, e.g. with auxiliary current source, with dual mode control or with inductance variation · CPC title
Devices or circuits for detecting current in a converter · CPC title
Related publications grouped by family.
Answers are generated from the same data shown on this page.