Semiconductor switching element and method of manufacturing the same

Patent metadata

Field	Value
Publication number	US-10205013-B2
Application number	US-201715844659-A
Country	US
Kind code	B2
Filing date	Dec 18, 2017
Priority date	Apr 21, 2017
Publication date	Feb 12, 2019
Grant date	Feb 12, 2019

Abstract

A semiconductor switching element includes a first gate electrode and a second gate electrode. The first gate electrode is disposed, via a first gate insulating film, inside a first trench that extends from an upper surface of an emitter region to reach a semiconductor layer, and intersects with the emitter region, a base region, and a charge storage layer. The second gate electrode is disposed, via a second gate insulating film, inside a second trench that extends from the upper surface of the emitter region and an upper surface of a conductive region to reach the semiconductor layer, and is adjacent to the emitter region, the base region, the charge storage layer, and the conductive region. The second trench is smaller in depth than the first trench, and the second trench is smaller in width than the first trench.

First claim

What is claimed is:

1. A semiconductor switching element comprising:
a semiconductor layer being a first conductivity type;
plural charge storage layers disposed on first planes in an upper surface of said semiconductor layer;
plural base regions being a second conductivity type and disposed on said charge storage layers;
plural emitter regions being the first conductivity type and disposed on said base regions;
plural conductive regions being the second conductivity type and disposed on second planes in the upper surface of said semiconductor layer;
a repeating pattern of at least one first gate electrode between two second gate electrodes;
regions of second conductivity type having a higher impurity concentration than said base regions and separating said plural emitter regions from each other in a plan view in cooperation with said base regions, wherein
the first gate electrode is disposed, via a first gate insulating film, inside a first trench that extends from an upper surface of said emitter regions to reach said semiconductor layer, and intersects with one of said plural emitter regions, one of said plural base regions, and one of said plural charge storage layers,
each second gate electrode is disposed, via a second gate insulating film, inside a second trench that extends from the upper surface of one of said emitter regions and an upper surface of one of said conductive regions to reach said semiconductor layer, and is adjacent to one of said emitter regions, one of said base regions, one of said charge storage layers, and one of said conductive regions,
each said second trench is smaller in depth than said first trench, and each said second trench is smaller in width than said first trench,
said plural emitter regions and said plural charge storage layers correspond to each other in a pattern in a plan view, and
a gate voltage is applied to said at least one first gate electrode and said second gate electrodes.

2. The semiconductor switching element according to claim 1 , further comprising a cathode region being the first conductivity type and disposed below one of said conductive regions and said semiconductor layer.

3. A method of manufacturing a semiconductor switching element, comprising:
(a) forming
plural charge storage layers disposed on first planes in an upper surface of a semiconductor layer being a first conductivity type,
plural base regions being a second conductivity type and formed on said charge storage layers,
plural emitter regions being the first conductivity type and disposed on said base regions, and
plural conductive regions being the second conductivity type and disposed on second planes in an upper surface of the said semiconductor layer;

(b) forming
plural first trenches extending from an upper surface of said emitter regions to reach said semiconductor layer, and intersecting with one of said plural emitter regions, one of said plural base regions, and one of said plural charge storage layers, and
plural second trenches, each said second trench extending from the upper surface of said emitter regions and an upper surface of one of said conductive regions to reach said semiconductor layer, and being adjacent to one of said emitter regions, one of said base regions, one of said charge storage layers, and one of said conductive regions;

(c) forming
first gate electrodes inside said first trenches, respectively, via first gate insulating films, and
second gate electrodes, respectively, inside said second trenches via second gate insulating films;

(d) forming
regions of second conductivity type having a higher impurity concentration than said base regions and separating said plural emitter regions from each other in a plan view in cooperation with said base regions, wherein

said plural second trenches are smaller in depth than said plural first trenches, and said plural second trenches are smaller in width than said plural first trenches,
said first gate electrodes and said second gate electrodes are formed in a repeating pattern of a first gate electrode between two second gate electrodes,
said plural emitter regions and said plural charge storage layers correspond to each other in a pattern in a plan view, and
a gate voltage is applied to said first gate electrodes and said second gate electrodes.

4. The method of manufacturing a semiconductor switching element according to claim 3 , further comprising (e) forming a cathode region being the first conductivity type below one of said conductive regions and said semiconductor layer.

Assignees

• Mitsubishi Electric Corp

Inventors

• Kaneda Mitsuru
• Takahashi Tetsuo
• Suzuki Kenji
• Kamibaba Ryu
• Umeyama Mariko
• Nishi Koichi

Classifications

• H01L29/0804

  Electricity · mapped topic

• H01L29/0696

  Electricity · mapped topic

• H01L29/4236

  Electricity · mapped topic

• H01L29/7397 Primary

  Electricity · mapped topic

• H01L29/0821

  Electricity · mapped topic