Multi-layer printed circuit board and a wireless communication node

US10201073B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10201073-B2
Application numberUS-201615515242-A
CountryUS
Kind codeB2
Filing dateMay 31, 2016
Priority dateMay 31, 2016
Publication dateFeb 5, 2019
Grant dateFeb 5, 2019

How to read this patent

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A multi-layer Printed Circuit Board PCB and a wireless communication node are disclosed in the present invention. The multi-layer PCB which is to be assembled in the communication node may include multiple radio layers ( 501 ) on one side of the PCB and at least one antenna layer ( 502 ) on another side of the PCB. At least one radio component is to be mounted on a surface layer of the multiple radio layers and at least one antenna element is to be patched on a surface layer of the at least one antenna layer. In such way, legacy connectors from the filter unit respectively to the antenna unit and the radio unit in conventional PCB can be left out to decrease the size of the PCB.

First claim

Opening claim text (preview).

The invention claimed is: 1. A multi-layer printed circuit board (PCB) in a wireless communication node, comprising: multiple radio layers on one side of the PCB, wherein at least one radio component is to be mounted on a surface layer of the multiple radio layers, and wherein the at least one radio component comprises a surface mounted filter; and at least one antenna layer on another side of the PCB, wherein an antenna element is to be patched on a surface layer of the at least one antenna layer. 2. The PCB in a wireless communication node according to claim 1 , further comprising: an isolator layer between the multiple radio layers and the at least one antenna layer. 3. The PCB in a wireless communication node according to claim 1 , wherein the multiple radio layers comprise a ground plane, and the at least one antenna layer comprises a ground plane layer. 4. The PCB in a wireless communication node according to claim 1 , wherein the at least one radio components comprise one or more baseband components of: field-programmable gate array (FPGA), digital signal processor (DSP), central processing unit (CPU), and random-access memory (RAM). 5. The PCB in a wireless communication node according to claim 1 , wherein the wireless communication node is a terminal device or an access node. 6. The PCB in a wireless communication node according to claim 2 , wherein the multiple radio layers comprise a ground plane, and the at least one antenna layer comprises a ground plane layer. 7. A wireless communication node in wireless telecommunication system, the wireless communication node comprising: a multi-layer printed circuit board (PCB); at least one radio component being mounted on a surface layer of the multi-layer PCB wherein the at least one radio component comprises a surface mounted filter; and an antenna element being patched on another surface layer of the multi-layer PCB; wherein the multi-layer PCB comprising: multiple radio layers including the surface layer on which the at least one radio components are mounted; and at least one antenna layer including the other surface layer on which the at least one antenna element is patched. 8. The wireless communication node according to claim 7 , wherein the multi-layer PCB further comprises: an isolator layer between the multiple radio layers and the at least one antenna layer. 9. The wireless communication node according to claim 7 , wherein the multiple radio layers comprise a ground plane, and the at least one antenna layer comprises a ground plane layer. 10. The wireless communication node according to claim 7 , wherein the at least one radio components comprise one or more baseband components of: field-programmable gate array (FPGA), digital signal processor (DSP), central processing unit (CPU), and random-access memory (RAM). 11. The wireless communication node according to claim 7 , wherein the at least one antenna element comprises one or more of: high frequency antenna element, super high frequency antenna element or ultra high frequency antenna element. 12. The wireless communication node according to claim 7 , wherein the wireless communication node is in a Multiple Input Multiple Output MIMO system. 13. The wireless communication node according to claim 7 , wherein the wireless communication node is an access node or a terminal device. 14. The wireless communication node according to claim 8 , wherein the multiple radio layers comprise a ground plane, and the at least one antenna layer comprises a ground plane layer.

Assignees

Inventors

Classifications

  • Package configurations · CPC title

  • MIMO systems · CPC title

  • provided by an inner layer of PCB · CPC title

  • Substantially flat resonant element parallel to ground plane, e.g. patch antenna (dipole H01Q9/285; monopole H01Q9/40) · CPC title

  • H05K1/0218Primary

    by printed shielding conductors, ground planes or power plane (H05K1/0236 takes precedence) · CPC title

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Frequently asked questions

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What does patent US10201073B2 cover?
A multi-layer Printed Circuit Board PCB and a wireless communication node are disclosed in the present invention. The multi-layer PCB which is to be assembled in the communication node may include multiple radio layers ( 501 ) on one side of the PCB and at least one antenna layer ( 502 ) on another side of the PCB. At least one radio component is to be mounted on a surface layer of the multiple…
Who is the assignee on this patent?
Ericsson Telefon Ab L M
What technology area does this patent fall under?
Primary CPC classification H05K1/0218. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 05 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).