Electronic component package and method of manufacturing the same

Patent metadata

Field	Value
Publication number	US-10199337-B2
Application number	US-201615144162-A
Country	US
Kind code	B2
Filing date	May 2, 2016
Priority date	May 11, 2015
Publication date	Feb 5, 2019
Grant date	Feb 5, 2019

Abstract

An electronic component package and a method of manufacturing the same are provided. The electronic component package includes a frame having a through-hole, an electronic component disposed in the through-hole of the frame, and a redistribution part disposed at one side of the frame and the electronic component. One or more first wiring layers of the frame are electrically connected to the electronic component through the redistribution part.

First claim

What is claimed is:

1. An electronic component package, comprising:
a frame having a through-hole, a plurality of insulating layers, one or more first wiring layers, disposed between the plurality of insulating layers, a second wiring layer disposed at one side of the plurality of insulating layers, and a third wiring layer disposed at another side of the plurality of insulating layers;
an electronic component disposed in the through-hole of the frame; and
a redistribution part disposed on one side of the frame and the electronic component,
wherein the one or more first wiring layers are electrically connected to the electronic component through the redistribution part,
the electronic component has an electrode pad for a signal, the electrode pad for a signal is electrically connected to a signal pattern of a wiring layer of the redistribution part through a first via for a signal of the redistribution part, the signal pattern of the wiring layer of the redistribution part is electrically connected to a signal pattern of the second wiring layer of the frame through a second via for a signal of the redistribution part, the signal pattern of the second wiring layer of the frame is electrically connected to a signal pattern of the first wiring layer of the frame through a via for a signal of the frame, the signal pattern of the first wiring layer of the frame is electrically connected to a signal pattern of the third wiring layer of the frame through an internal via for a signal of the frame, and the signal pattern of the third wiring layer of the frame is electrically connected to an external connection terminal for a signal disposed in a fan-out region of another side of the frame, and
the second and third wiring layers of the frame have ground patterns.

2. An electronic component package comprising:
a frame including a first insulating layer, two or more wiring layers disposed on one side of the first insulating layer, and a second insulating layer disposed between the two or more wiring layers;
an electronic component disposed in a through-hole penetrating through the frame; and
a redistribution part electrically connected to the two or more wiring layers and the electronic component, and having one side on which the electronic component is disposed,
wherein the two or more wiring layers and the second insulating layer are disposed between the redistribution part and the first insulating layer,
the frame further includes a third wiring layer disposed on another side of the first insulating layer, and
the electronic component has an electrode pad for a signal, the electrode pad for a signal is electrically connected to a signal pattern of a wiring layer of the redistribution part through a first via for a signal of the redistribution part, the signal pattern of the wiring layer of the redistribution part is electrically connected to a signal pattern of one of the two or more wiring layers of the frame through a second via for a signal of the redistribution part, the signal pattern of the one of the two or more wiring layers of the frame is electrically connected to a signal pattern of another of the two or more wiring layers of the frame through a via for a signal of the frame, the signal pattern of the another of the two or more wiring layers of the frame is electrically connected to a signal pattern of the third wiring layer of the frame through an internal via for a signal of the frame, and the signal pattern of the third wiring layer of the frame is electrically connected to an external connection terminal for a signal disposed in a fan-out region.

Assignees

• Samsung Electro Mech

Inventors

• Park Dae Hyun
• Kim Han
• Hur Kang Heon
• Ko Young Gwan
• Shim Jung Ho

Classifications

• H10W90/754

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/734

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/732

  between stacked chips · CPC title

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/722

  between stacked chips · CPC title