Sensor for a semiconductor device
US-9793184-B2 · Oct 17, 2017 · US
US10199291B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10199291-B2 |
| Application number | US-201715683460-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 22, 2017 |
| Priority date | Mar 11, 2015 |
| Publication date | Feb 5, 2019 |
| Grant date | Feb 5, 2019 |
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A semiconductor arrangement is presented. The semiconductor arrangement comprises a semiconductor body, the semiconductor body including a semiconductor drift region, wherein the semiconductor drift region has dopants of a first conductivity type; a first semiconductor sense region and a second semiconductor sense region, wherein each of the first semiconductor sense region and the second semiconductor sense region is electrically connected to the semiconductor drift region and has dopants of a second conductivity type different from said first conductivity type; a first metal contact comprising a first metal material, the first metal contact being in contact with the first semiconductor sense region, wherein a transition between the first metal contact and the first semiconductor sense region forms a first metal-to-semiconductor transition; a second metal contact comprising a second metal material different from said first metal material, the second metal contact being separated from the first metal contact and in contact with the second semiconductor sense region, a transition between the second metal contact and the second semiconductor sense region forming a second metal-to-semiconductor transition different from said first metal-to-semiconductor transition; first electrical transmission means, the first electrical transmission means being arranged and configured for providing a first sense signal derived from an electrical parameter of the first metal contact to a first signal input of a sense signal processing unit; and second electrical transmission means separated from said first electrical transmission means, the second electrical transmission means being arranged and configured for providing a second sense signal derived from an electrical parameter of the second metal contact to a second signal input of said sense signal processing unit.
Opening claim text (preview).
The invention claimed is: 1. An insulated gate bipolar transistor arrangement comprising: a body, the body including a drift region, wherein the drift region has dopants of a first conductivity type; a first sense region and a second sense region, wherein each of the first sense region and the second sense region is electrically connected to the drift region and has dopants of a second conductivity type different from the first conductivity type; a first metal contact comprising a first metal material, the first metal contact being in contact with the first sense region, wherein a transition between the first metal contact and the first sense region forms a first metal-to-semiconductor transition; and a second metal contact comprising a second metal material different from the first metal material, the second metal contact being separated from the first metal contact and in contact with the second sense region, a transition between the second metal contact and the second sense region forming a second metal-to-semiconductor transition different from the first metal-to-semiconductor transition. 2. The insulated gate bipolar transistor arrangement of claim 1 , further comprising a signal processing unit configured to determine a value of a physical parameter of the body based on a first sense signal and a second sense signal, wherein the first sense signal is derived from an electrical parameter of the first metal contact and the second sense signal is derived from an electrical parameter of the second metal contact. 3. The insulated gate bipolar transistor arrangement of claim 2 , wherein the signal processing unit comprises: a first shunt and a first output terminal, wherein the first shunt is arranged for conducting a first current between a first signal input and the first output terminal; and a second shunt and a second output terminal, wherein the second shunt is arranged for conducting a second current between a second signal input and the second output terminal. 4. The insulated gate bipolar transistor arrangement of claim 3 , wherein the first output terminal and the second output terminal are electrically connected to each other and to a load contact of the semiconductor arrangement. 5. The insulated gate bipolar transistor arrangement of claim 3 , wherein the signal processing unit comprises a first voltage measurement system configured to determine a first voltage drop (V 1 ) across the first shunt and second voltage measurement system configured to determine a second voltage drop (V 2 ) across the second shunt. 6. The insulated gate bipolar transistor arrangement of claim 2 , wherein the electrical parameter of the first metal contact comprises an electrical potential of the first metal contact and the electrical parameter of the second metal contact comprises an electrical potential of the second metal contact. 7. The insulated gate bipolar transistor arrangement of claim 2 , wherein the electrical parameter of the first metal contact comprises a current through the first metal contact and the electrical parameter of the second metal contact comprises a current through the second metal contact. 8. The insulated gate bipolar transistor arrangement of claim 2 , wherein the physical parameter of the body is indicative of a temperature of the body. 9. The insulated gate bipolar transistor arrangement of claim 2 , wherein the physical parameter of the body is indicative of a load current conducted by the body. 10. The insulated gate bipolar transistor arrangement of claim 1 , wherein the first sense region is separated from the second sense region by a portion of the drift region. 11. The insulated gate bipolar transistor arrangement of claim 1 , wherein the first sense region is in contact with the second sense region. 12. The insulated gate bipolar transistor arrangement of claim 1 , wherein each of the first sense region and the second sense region is arranged at least partially internal of the body and is in contact with the drift region. 13. The insulated gate bipolar transistor arrangement of claim 1 , wherein a resistance of the first metal-to-semiconductor transition has a temperature dependency that is different from a temperature dependency of a resistance of the second metal-to-semiconductor transition. 14. An insulated gate bipolar transistor arrangement comprising: a body, the body including a drift region, wherein the drift region has dopants of a first conductivity type; an emitter contact electrically coupled to the body and a collector contact electrically coupled to the body, the drift region being arranged for conducting a load current between the emitter contact and the collector contact in an active region of the body; a plurality of drain regions arranged at least partially internal of the body between the active region of the body and a non-active region of the body, wherein each of the plurality of drain regions are in contact with the drift region and have dopants of a second conductivity type different from the first conductivity type, and wherein the plurality of drain regions comprise a first drain region acting as a first sense region, a second drain region acting as a second sense region, and at least one third drain region, the at least one third drain region being electrically connected to the emitter contact and being configured for draining charge carriers from the drift region; a first metal contact comprising a first metal material, the first metal contact being separated from the emitter contact and the collector contact and in contact with the first sense region, wherein a transition between the first metal contact and the first sense region forms a first metal-to-semiconductor transition; and a second metal contact comprising a second metal material different from the first metal material, the second metal contact being separated from the emitter contact, the collector contact, and the first metal contact, and being in contact with second sense region, a transition between the second metal contact and the second sense region forming a second metal-to-semiconductor transition different from the first metal-to-semiconductor transition. 15. The insulated gate bipolar transistor arrangement of claim 14 , wherein the third drain region is separated from the first sense region and from the second sense region. 16. The insulated gate bipolar transistor arrangement of claim 14 , wherein a resistance of the first metal-to-semiconductor transition has a temperature dependency that is different from a temperature dependency of a resistance of the second metal-to-semiconductor transition. 17. A method for determining a physical parameter of an insulated gate bipolar transistor, wherein the insulated gate bipolar transistor comprises: a body, the body including a drift region, wherein the drift region has dopants of a first conductivity type; a first sense region and a second sense region, wherein each of the first sense region and the second sense region is electrically connected to the drift region and has dopants of a second conductivity type different from the first conductivity type; a first metal contact comprising a first metal material, the first metal contact being in contact with the first sense region, wherein a transition between the first metal contact and the first sense region forms a first metal-to-semiconductor transition; and a second metal contact comprising a second metal material different from the first metal material, the second metal contact being separated from the first metal contact and in contact with the second sens
characterised by multiple measurements, corrections, marking or sorting processes · CPC title
Structural arrangements therefor · CPC title
Electrical properties, e.g. testing or measuring of resistance, deep levels or capacitance-voltage characteristics · CPC title
Circuits for electrically characterising or monitoring manufacturing processes, e.g. circuits in tested chips or circuits in testing wafers · CPC title
Electricity · mapped topic
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