Early development of a database of fail signatures for systematic defects in integrated circuit (IC) chips

Patent metadata

Field	Value
Publication number	US-10191112-B2
Application number	US-201615355256-A
Country	US
Kind code	B2
Filing date	Nov 18, 2016
Priority date	Nov 18, 2016
Publication date	Jan 29, 2019
Grant date	Jan 29, 2019

Abstract

Disclosed are embodiments of a method that provides for pre-production run development of a fail signature database, which stores fail signatures for systematic defects and corresponding root causes. The fail signatures in the database is subsequently accessed and used for a variety of purposes. For example, the fail signatures are evaluated and, based on the results of the evaluation, actions are taken to prevent specific systematic defects from occurring during production runs and/or to allow for early detection of specific systematic defects during production runs. In some embodiments, following production runs, new fail signatures from failing production chips are developed and compared against the fail signatures in the fail signature database. In some embodiments, when a signature match indicates that a particular production chip has a same systematic defect with a same root cause as a particular prototype chip in-line advanced process control (APC) is performed.

First claim

What is claimed is:

1. A method for fail signature database development and use during chip manufacturing, the method comprising:
developing a fail signature database, the fail signature database storing fail signatures and corresponding root causes associated with systematic defects, the systematic defects being previously identified on failing prototype chips manufactured according to a specific design and the corresponding root causes being determined given different process specifications used to form at least some of the prototype chips; and
using the fail signature database for detection of one or more specific systematic defects in the production chips, wherein production chips are subsequently manufactured according to the specific design and using a particular set of process specifications;
wherein the using of the fail signature database comprises:
after the developing of the fail signature database, manufacturing the production chips;
identifying failing production chips;
developing new fail signatures for systematic defects on the failing production chips; and
comparing the new fail signatures to the fail signatures in the fail signature database to find signatures matches, each signature match being indicative of a given failing production chip having a same systematic defect with a same root cause as a given failing prototype chip;

further comprising, based on the signature match, performing in-line advanced process control.

2. The method of claim 1 , further comprising using the fail signature database for prevention of at least one systematic defect by evaluating the fail signatures in the fail signature database and, based on results of the evaluating, adjusting any of the specific design and the process specifications in the particular set of process specifications to prevent occurrence, in the production chips, of at least one specific systematic defect corresponding to at least one specific fail signature in the fail signature database.

3. The method of claim 1 , wherein the using of the fail signature database comprises evaluating the fail signatures and, based on results of the evaluating, performing at least one level-specific inspection during manufacturing of the production chips to detect at least one specific systematic defect corresponding to at least one specific fail signature in the fail signature database.

4. The method of claim 1 , further comprising performing root cause analyses to confirm the corresponding root causes for at least some of the systematic defects.

5. The method of claim 1 , wherein the process specifications in the particular set of process specifications comprise lithographic process specifications.

6. A method for fail signature database development and use during chip manufacturing, the method comprising:
developing a fail signature database, the developing comprising:
manufacturing prototype chips according a specific design and such that different process specifications are used to form at least some of the prototype chips;
identifying failing prototype chips with systematic defects;
developing fail signatures for the systematic defects, each fail signature indicating test results associated with a particular systematic defect on a particular failing prototype chip;
hypothesizing corresponding root causes for the systematic defects, the particular systematic defect having a root cause that is hypothesized based on the test results and on specific process specifications used to form the particular failing prototype chip; and
storing the fail signatures with the corresponding root causes in the fail signature database; and
using the fail signature database for detection of one or more specific systematic defects in production chips, wherein the production chips are subsequently manufactured according to the specific design and using a particular set of process specifications;
wherein the using of the fail signature database comprises:
after the developing of the fail signature database, manufacturing the production chips;
identifying failing production chips;
developing new fail signatures for systematic defects on the failing production chips; and
comparing the new fail signatures to the fail signatures in the fail signature database to find signatures matches, each signature match being indicative of a given failing production chip having a same systematic defect with a same root cause as a given failing prototype chip;

further comprising, based on the signature match, performing in-line advanced process control.

7. The method of claim 6 , further comprising using of the fail signature database to prevent at least one specific defect by evaluating the fail signatures in the fail signature database and, based on results of the evaluating, adjusting any of the specific design and the process specifications in the particular set of process specifications to prevent occurrence in the production chips of at least one specific systematic defect corresponding to at least one specific fail signature in the fail signature database.

8. The method of claim 6 , wherein the using of the fail signature database comprises evaluating the fail signatures and, based on results of the evaluating, performing at least one level-specific inspection during manufacturing of the production chips to detect at least one specific systematic defect corresponding to at least one specific fail signature in the fail signature database.

9. The method of claim 6 , further comprising performing root cause analyses to confirm the corresponding root causes for the systematic defects.

10. The method of claim 6 , wherein the process specifications in the particular set of process specifications-comprises lithographic process specifications.

11. A method for fail signature database development and use during chip manufacturing, the method comprising:
developing a fail signature database, the developing comprising:
manufacturing prototype chips according a specific design and, during the manufacturing of the prototype chips, performing at least one lithography learning technique such that, for each of multiple selected design levels, different lithographic process specifications are used to form at least some of the prototype chips, the at least one lithography learning technique comprising focus exposure matrix development, process window qualification and process window centering;
identifying failing prototype chips with systematic defects;
developing fail signatures for the systematic defects, each fail signature indicating test results associated with a particular systematic defect on a particular failing prototype chip;
hypothesizing corresponding root causes for the systematic defects, the particular systematic defect having a root cause that is hypothesized based on the test results and on specific lithographic process specifications used during formation of a particular design level that is on the particular failing prototype chip and that contains the particular systematic defect; and
storing the fail signatures with the corresponding root causes in the fail signature database; and
using the fail signature database detection of one or more specific systematic defects in production chips, wherein the production chips are subsequently manufactured according to the specific design and using a particular set of process specifications;
wherein the using of the fail signature database comprises:
after the developing of the fail signature database, manufacturing the production chips;
identifying failing production chips;
developing new fail signatures for systematic defects on the failing production chips; and comparing the new fail signatures to th

Assignees

• Globalfoundries Inc

Inventors

• Desineni Rao
• Chittora Atul
• Pan Yan
• Fernandes Sherwin
• Herrmann Thomas

Classifications

• G01R31/31703 Primary

  Comparison aspects, e.g. signature analysis, comparators (concerning scan tests G01R31/318566; concerning testers G01R31/3193) · CPC title

• G01R31/3177

  Testing of logic operation, e.g. by logic analysers · CPC title

• G06F30/39

  Circuit design at the physical level (physical level design for reconfigurable circuits G06F30/347) · CPC title

• G06F16/20

  of structured data, e.g. relational data · CPC title

• G01R31/31718

  Logistic aspects, e.g. binning, selection, sorting of devices under test, tester/handler interaction networks, Test management software, e.g. software for test statistics or test evaluation, yield analysis (mechanical aspects G01R31/2808, G01R31/2851) · CPC title