Semiconductor device and method of forming microelectromechanical systems (MEMS) package

Patent metadata

Field	Value
Publication number	US-10189702-B2
Application number	US-201615362199-A
Country	US
Kind code	B2
Filing date	Nov 28, 2016
Priority date	Mar 13, 2014
Publication date	Jan 29, 2019
Grant date	Jan 29, 2019

Abstract

A semiconductor device has a first semiconductor die and a modular interconnect structure adjacent to the first semiconductor die. An encapsulant is deposited over the first semiconductor die and modular interconnect structure as a reconstituted panel. An interconnect structure is formed over the first semiconductor die and modular interconnect structure. An active area of the first semiconductor die remains devoid of the interconnect structure. A second semiconductor die is mounted over the first semiconductor die with an active surface of the second semiconductor die oriented toward an active surface of the first semiconductor die. The reconstituted panel is singulated before or after mounting the second semiconductor die. The first or second semiconductor die includes a microelectromechanical system (MEMS). The second semiconductor die includes an encapsulant and an interconnect structure formed over the second semiconductor die. Alternatively, the second semiconductor die is mounted to an interposer disposed over the interconnect structure.

First claim

What is claimed:

1. A method of making a semiconductor device, comprising:
providing a first semiconductor die;
disposing a modular interconnect structure laterally with respect to the first semiconductor die;
depositing an encapsulant around the first semiconductor die and modular interconnect structure;
forming a build-up interconnect structure over the first semiconductor die and modular interconnect structure after depositing the encapsulant, wherein a non-routing area over the first semiconductor die remains devoid of the build-up interconnect structure; and
disposing a second semiconductor die over the first semiconductor die, wherein the first semiconductor die or second semiconductor die includes a microelectromechanical device, wherein an active surface of the first semiconductor die is oriented toward an active surface of the second semiconductor die.

2. The method of claim 1 , further including forming an interconnect structure over the modular interconnect structure opposite the build-up interconnect structure.

3. The method of claim 1 , further including forming a conductive via through the modular interconnect structure.

4. The method of claim 1 , further including disposing an interposer between the first semiconductor die and second semiconductor die.

5. The method of claim 1 , further including disposing a lid over the second semiconductor die.

6. A method of making a semiconductor device, comprising:
providing a first semiconductor die;
disposing a modular interconnect structure adjacent to the first semiconductor die;
forming a first interconnect structure over the first semiconductor die and modular interconnect structure, wherein a non-routing area over the first semiconductor die remains devoid of the first interconnect structure; and
disposing a second semiconductor die over the first semiconductor die, wherein the first semiconductor die or second semiconductor die includes a microelectromechanical device, and wherein an active surface of the first semiconductor die is oriented toward an active surface of the second semiconductor die.

7. The method of claim 6 , further including depositing an encapsulant around the first semiconductor die and modular interconnect structure.

8. The method of claim 6 , further including forming a second interconnect structure over the second semiconductor die.

9. The method of claim 6 , further including forming a conductive via through the modular interconnect structure.

10. The method of claim 6 , wherein an active surface of the first semiconductor die is oriented toward an active surface of the second semiconductor die.

11. The method of claim 6 , wherein an active surface of the first semiconductor die is oriented away from an active surface of the second semiconductor die.

12. The method of claim 6 , further including disposing an interposer between the first semiconductor die and second semiconductor die.

13. A method of making a semiconductor device, comprising:
providing a first semiconductor die;
disposing a modular interconnect structure adjacent to the first semiconductor die;
depositing a first encapsulant around the first semiconductor die and modular interconnect structure;
forming a first interconnect structure over the first semiconductor die and modular interconnect structure after depositing the encapsulant; and
disposing a second semiconductor die over the first semiconductor die, wherein an active surface of the first semiconductor die is oriented toward an active surface of the second semiconductor die.

14. The method of claim 13 , wherein the first semiconductor die or second semiconductor die includes a microelectromechanical device.

15. The method of claim 13 , further including depositing a second encapsulant around the second semiconductor die.

16. The method of claim 13 , further including forming a second interconnect structure over the second semiconductor die.

17. The method of claim 13 , further including forming a conductive via through the modular interconnect structure.

18. A method of making a semiconductor device, comprising:
providing a first semiconductor die;
disposing a modular interconnect structure adjacent to the first semiconductor die;
depositing an encapsulant over the first semiconductor die and modular interconnect structure;
forming a build-up interconnect structure over the encapsulant, first semiconductor die, and modular interconnect structure; and
disposing a second semiconductor die over the first semiconductor die and build-up interconnect structure, wherein the first semiconductor die or second semiconductor die includes a microelectromechanical device, and wherein an active surface of the first semiconductor die is oriented toward an active surface of the second semiconductor die.

19. The method of claim 18 , further including depositing an encapsulant around the first semiconductor die and modular interconnect structure.

20. The method of claim 18 , further including forming an interconnect structure over the first semiconductor die and modular interconnect structure.

21. The method of claim 18 , further including depositing an encapsulant around the second semiconductor die.

22. The method of claim 18 , further including forming an interconnect structure over the second semiconductor die.

23. The method of claim 18 , further including forming a conductive via through the modular interconnect structure.

Assignees

• Stats Chippac Pte Ltd

Inventors

• Lin Yaojian
• Choi Won Kyoung
• Chen Kang
• Micallef Ivan

Classifications

• B81C2203/0792

  Forming interconnections between the electronic processing unit and the micromechanical structure · CPC title

• B81B2207/098

  Arrangements not provided for in groups B81B2207/092 - B81B2207/097 · CPC title

• B81B2207/092

  Buried interconnects in the substrate or in the lid · CPC title

• B81B7/007 Primary

  Interconnections between the MEMS and external electrical signals · CPC title

• B81C1/00301

  Connecting electric signal lines from the MEMS device with external electrical signal lines, e.g. through vias · CPC title