Molded chip fabrication method and apparatus

Patent metadata

Field	Value
Publication number	US-10164158-B2
Application number	US-86264010-A
Country	US
Kind code	B2
Filing date	Aug 24, 2010
Priority date	Sep 18, 2003
Publication date	Dec 25, 2018
Grant date	Dec 25, 2018

Abstract

A method and apparatus for coating a plurality of semiconductor devices that is particularly adapted to coating LEDs with a coating material containing conversion particles. One method according to the invention comprises providing a mold with a formation cavity. A plurality of semiconductor devices are mounted within the mold formation cavity and a curable coating material is injected or otherwise introduced into the mold to fill the mold formation cavity and at least partially cover the semiconductor devices. The coating material is cured so that the semiconductor devices are at least partially embedded in the cured coating material. The cured coating material with the embedded semiconductor devices is removed from the formation cavity. The semiconductor devices are separated so that each is at least partially covered by a layer of the cured coating material. One embodiment of an apparatus according to the invention for coating a plurality of semiconductor devices comprises a mold housing having a formation cavity arranged to hold semiconductor devices. The formation cavity is also arranged so that a curable coating material can be injected into and fills the formation cavity to at least partially covering the semiconductor devices.

First claim

We claim:

1. An apparatus for coating a plurality of semiconductor devices, comprising:
a mold housing comprising:
a top rigid block support;
a bottom rigid block support to hold semiconductor devices, said semiconductor devices comprising positive and negative terminals;
a formation cavity between said top and bottom block supports;
two or more spacers, coupled between the top rigid block support and the bottom rigid block support, wherein a coating material can be introduced into said formation cavity for at least partially covering said semiconductor devices, in which the two or more spacers define a thickness of the coating material applied to the plurality of semiconductor devices in said formation cavity, wherein said mold housing protects said positive and negative terminals from said coating material; and
two adhesive films, wherein a first of said two adhesive films is on said top rigid block support and a second of said two adhesive films is on said bottom rigid block support between said two or more spacers, said two adhesive films covering said positive and negative terminals of said semiconductor devices such that said terminals are protected from being covered by said coating material when said coating material is introduced into said formation cavity.

2. The apparatus of claim 1 , wherein said coating material is introduced by injection into said formation cavity.

3. The apparatus of claim 1 , wherein the coating material substantially fills said formation cavity.

4. The apparatus of claim 1 , wherein said semiconductor devices comprise light emitting diodes (LEDs).

5. The apparatus of claim 1 , wherein said coating material comprises light conversion particles distributed in a curable epoxy, silicone or other polymer.

6. The apparatus of claim 1 , wherein said semiconductor devices are positioned on said top surface of said bottom block support, within said formation cavity.

7. The apparatus of claim 1 , wherein said adhesive films comprise a first double sided adhesive film on the top surface of said bottom rigid block support and a second double sided adhesive film on the bottom surface of said top rigid block support, said plurality of semiconductor devices on said first or second adhesive films, wherein said positive and negative terminals are integral to said plurality of semiconductor devices and are on said first or second adhesive films.

8. The apparatus of claim 7 , wherein said first and second double sided adhesive films do not bond to said coating material.

9. The apparatus of claim 1 , wherein said coating material can be cured or otherwise hardened in said formation cavity, at least partially embedding said semiconductor devices in said coating material.

10. The apparatus of claim 9 , wherein said cured or hardened coating material with embedded semiconductor devices can be removed from said formation cavity and said semiconductor devices separated with a layer of coating material remaining on each of said semiconductor devices.

Assignees

• Leung Michael S
• Tarsa Eric J
• Ibbetson James
• Cree Inc

Inventors

• Leung Michael S
• Tarsa Eric J
• Ibbetson James

Classifications

• H10D62/117

  Shapes of semiconductor bodies · CPC title

• H10W74/00

  Encapsulations, e.g. protective coatings · CPC title

• H10W74/10

  characterised by their shape or disposition · CPC title

• H10W70/60

  Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40) · CPC title

• H10W74/016 Primary

  using moulds · CPC title