Chip card module arrangement, chip card arrangement and method for producing a chip card arrangement

US10157848B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10157848-B2
Application numberUS-201514882524-A
CountryUS
Kind codeB2
Filing dateOct 14, 2015
Priority dateOct 14, 2014
Publication dateDec 18, 2018
Grant dateDec 18, 2018

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A chip card module arrangement may include a first surface and a second surface, which are opposite from one another, and a chip receptacle for one or more semiconductor chips on the surfaces. The chip card module arrangement may further include a connecting material receiving area on one of the two surfaces, the connecting material receiving area only taking up a portion of the surface.

First claim

Opening claim text (preview).

What is claimed is: 1. A chip card module arrangement, comprising: a first surface and a second surface, which are opposite from one another; a chip receptacle for one or more semiconductor chips on the first surface and/or the second surface; a connecting material receiving area on the first surface and/or the second surface, the connecting material receiving area configured to receive a connecting material and only taking up a portion of the respective surface, wherein the connecting material receiving area is disjoint from the chip receptacle, and wherein the connecting material comprises an adhesive disposed on at least one of the two surfaces where the adhesive is configured to couple to at least one carrier layer; and an antenna arrangement disposed directly on a surface opposite to the chip receptacle and wherein the adhesive is further configured to directly couple the chip card module arrangement to a surface of the at least one carrier layer. 2. The chip card module arrangement of claim 1 , wherein the chip receptacle and also the connecting material receiving area lie on the same one of the two surfaces and the connecting material receiving area takes up only the area that is disjoint from an area of the chip receptacle. 3. The chip card module arrangement of claim 1 , wherein the chip receptacle is on the first surface and the connecting material receiving area is located on the second surface and the connecting material receiving area only takes up the area that is disjoint from the area of the chip receptacle in the projection onto the first surface. 4. The chip card module arrangement of claim 1 , wherein the connecting material receiving area is located on one of the two surfaces and is configured as a continuous area or as equally distributed areas within a surface. 5. The chip card module arrangement of claim 1 , wherein parts of the antenna arrangement are located on the connecting material receiving area. 6. The chip card module arrangement of claim 1 , wherein a stabilizing element is located on the first surface and the chip receptacle lies on the second surface. 7. The chip card module arrangement of claim 6 , wherein an area of the stabilizing element on the first surface is disjoint from that of the connecting material receiving area on the first surface. 8. The chip card module arrangement of claim 6 , wherein an area of the stabilizing element on the first surface and the connecting material receiving area on the second surface are disjoint in the projection onto the first surface. 9. The chip card module arrangement of claim 1 , wherein an adhesive has been applied to the connecting material receiving area as connecting material. 10. The chip card module arrangement of claim 5 , wherein the chip receptacle is on the first surface and the connecting material directly couples at least a portion of the second surface to the at least one carrier layer. 11. A chip card arrangement, comprising: at least one carrier layer; a chip card module arrangement which comprises a first surface and a second surface, which are opposite from one another, and a chip receptacle for one or more semiconductor chips on one of the two surfaces and a connecting material receiving area on one of the two surfaces, wherein the connecting material receiving area is disjoint from the chip receptacle, the connecting material receiving area configured to receive a connecting material and only taking up a portion of the respective surface; and the connecting material on the connecting material receiving area, and wherein the connecting material comprises an adhesive disposed on the first surface and/or the second surface where the adhesive directly couples the chip card module arrangement to the at least one carrier layer; and an antenna arrangement disposed directly on a surface opposite to the chip receptacle. 12. The chip card arrangement of claim 11 , wherein a second carrier layer is present in addition to the at least one carrier layer. 13. The chip card arrangement of claim 11 , wherein the one carrier layer or a number of carrier layers is or are the web or the webs of a chip card. 14. The chip card arrangement of claim 11 , wherein the carrier layer or the carrier layers contain(s) plastics material. 15. The chip card arrangement of claim 11 , wherein the connecting material is an adhesive. 16. The chip card arrangement of claim 11 , wherein at least one region of the chip card module arrangement is free from the connecting material. 17. A chip card module arrangement, comprising: a substrate comprising a first surface and a second surface, which are opposite from one another; a chip receptacle for one or more semiconductor chips on the first surface and/or the second surface; an antenna arrangement disposed directly on at least an opposite surface of the substrate from the chip receptacle, and a connecting material receiving area on at least the same surface as the antenna arrangement, the connecting material receiving area configured to receive a connecting material and only taking up a portion of the respective surface, wherein the connecting material receiving area is disjoint from the chip receptacle, wherein the connecting material comprises an adhesive disposed on at least the same surface as that having the antenna arrangement, wherein the connecting material is configured to directly couple the antenna arrangement to at least one carrier layer. 18. A chip card module arrangement, comprising: a substrate comprising a first surface and a second surface, which are opposite from one another; a chip receptacle for one or more semiconductor chips on the first surface and/or the second surface; an antenna arrangement on the first surface and/or the second surface; and a connecting material receiving area on the first surface and/or the second surface, the connecting material receiving area configured to receive a connecting material and only taking up a portion of the respective surface, wherein the connecting material receiving area is disjoint from the chip receptacle, and wherein the connecting material comprises an adhesive disposed on at least one of the two surfaces where the adhesive is configured to directly couple at least the antenna arrangement to at least one carrier layer; and wherein the antenna arrangement is disposed directly on a surface opposite to the chip receptacle.

Assignees

Inventors

Classifications

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • on active surfaces of flip-chip devices, e.g. underfills · CPC title

  • Encapsulations, e.g. protective coatings · CPC title

  • for antennas · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US10157848B2 cover?
A chip card module arrangement may include a first surface and a second surface, which are opposite from one another, and a chip receptacle for one or more semiconductor chips on the surfaces. The chip card module arrangement may further include a connecting material receiving area on one of the two surfaces, the connecting material receiving area only taking up a portion of the surface.
Who is the assignee on this patent?
Infineon Technologies Ag
What technology area does this patent fall under?
Primary CPC classification H10W70/611. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 18 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).