Wiring board, electronic device, and electronic module

US10157753B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10157753-B2
Application numberUS-201515513704-A
CountryUS
Kind codeB2
Filing dateSep 25, 2015
Priority dateSep 26, 2014
Publication dateDec 18, 2018
Grant dateDec 18, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A wiring board ( 1 ) includes an insulating substrate ( 11 ) having a cutout ( 12 ) opened in a main surface and a side surface of the insulating substrate ( 11 ), and an inner electrode ( 13 ) formed on an inner surface of the cutout ( 12 ). The inner electrode ( 13 ) includes a plurality of metal layers. The inner electrode ( 13 ) includes, as an intermediate layer, at least one metal layer ( 17 b ) selected from the group consisting of a nickel layer, a chromium layer, a platinum layer, and a titanium layer, and includes a gold layer as an outermost layer ( 17 a ). The metal layer ( 17 b ) is exposed at an outer edge portion of the inner electrode ( 13 ).

First claim

Opening claim text (preview).

The invention claimed is: 1. A wiring board, comprising: an insulating substrate having a cutout opened in a main surface and a side surface; and an inner electrode arranged on an inner surface of the cutout, the inner electrode including a plurality of metal layers, wherein the inner electrode includes, as an intermediate layer, at least one metal layer selected from the group consisting of a nickel layer, a chromium layer, a platinum layer, and a titanium layer, and includes a gold layer as an outermost layer, and when viewed in a direction perpendicular to the main surface of the insulating substrate, a part of the at least one metal layer extends from an outer edge portion of the gold layer adjacent to the side surface of the insulating substrate toward the side surface of the insulating substrate. 2. The wiring board according to claim 1 , wherein an outer edge portion of the inner electrode adjacent to the side surface of the insulating substrate extends along an opening of the cutout adjacent to the side surface of the insulating substrate. 3. The wiring board according to claim 1 , wherein the cutout has a curved inner surface. 4. The wiring board according to claim 1 , wherein the cutout has a shape corresponding to a portion obtained by dividing a partial square frustum, and the cutout has an opening width at the main surface greater than a bottom width. 5. An electronic device, comprising: the wiring board according to claim 1 ; and an electronic component mounted on the wiring board and electrically connected to the inner electrode. 6. An electronic module, comprising: a module substrate including a connection pad on a main surface of the module substrate; and the electronic device according to claim 5 including the inner electrode connected to the connection pad with solder. 7. The wiring board according to claim 2 , wherein the cutout has a curved inner surface. 8. The wiring board according to claim 2 , wherein the cutout has a shape corresponding to a portion obtained by dividing a partial square frustum, and the cutout has an opening width at the main surface greater than a bottom width.

Assignees

Inventors

Classifications

  • Suspended triplate lines · CPC title

  • Printed elements for providing electric connections to or between printed circuits · CPC title

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • Encapsulations, e.g. protective coatings · CPC title

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Frequently asked questions

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What does patent US10157753B2 cover?
A wiring board ( 1 ) includes an insulating substrate ( 11 ) having a cutout ( 12 ) opened in a main surface and a side surface of the insulating substrate ( 11 ), and an inner electrode ( 13 ) formed on an inner surface of the cutout ( 12 ). The inner electrode ( 13 ) includes a plurality of metal layers. The inner electrode ( 13 ) includes, as an intermediate layer, at least one metal layer (…
Who is the assignee on this patent?
Kyocera Corp
What technology area does this patent fall under?
Primary CPC classification H10W70/68. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 18 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).