Communication circuit with analog duty-cycle detection
US-2024322799-A1 · Sep 26, 2024 · US
US10153764B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10153764-B2 |
| Application number | US-201615377750-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 13, 2016 |
| Priority date | Dec 14, 2015 |
| Publication date | Dec 11, 2018 |
| Grant date | Dec 11, 2018 |
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A semiconductor device includes a first load terminal, a second load terminal and a semiconductor body coupled to the first load terminal and the second load terminal. The semiconductor body is configured to conduct a load current along a load current path between the first load terminal and the second load terminal. The semiconductor device further includes a control electrode electrically insulated from the semiconductor body and configured to control a part of the load current path, and an electrically floating sensor electrode arranged adjacent to the control electrode. The sensor electrode is electrically insulated from each of the semiconductor body, and the control electrode and is capacitively coupled to the load current path.
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What is claimed is: 1. A semiconductor device, comprising: a first load terminal, a second load terminal and a semiconductor body coupled to the first load terminal and the second load terminal, wherein the semiconductor body is configured to conduct a load current along a load current path between the first load terminal and the second load terminal; a control electrode electrically insulated from the semiconductor body and configured to control a part of the load current path; an electrically floating sensor electrode arranged adjacent to the control electrode, wherein the sensor electrode is electrically insulated from each of the semiconductor body and the control electrode and is capacitively coupled to the load current path; and a trench extending into the semiconductor body along a vertical direction, the trench including the control electrode, wherein the sensor electrode extends at least as far along the vertical direction as the control electrode, wherein the trench includes each of the sensor electrode and the control electrode. 2. The semiconductor device of claim 1 , further comprising an insulation structure configured to electrically insulate each of the control electrode and the sensor electrode from each of the first load terminal and the semiconductor body. 3. The semiconductor device of claim 2 , wherein the insulation structure is at least partially included in the trench and forms sidewalls and a bottom of the trench. 4. The semiconductor device of claim 3 , wherein the trench sidewalls comprise an upper part and a lower part, and wherein a thickness of the insulation structure at the lower part is equal to or smaller than a thickness of the insulation structure at the upper part. 5. The semiconductor device of claim 2 , wherein the insulation structure isolates the control electrode from the sensor electrode. 6. The semiconductor device of claim 1 , wherein a distance between the control electrode and the sensor electrode amounts to less than 3 μm. 7. The semiconductor device of claim 1 , wherein the sensor electrode is configured to provide a sensor signal, the sensor signal being indicative of a magnitude of the load current conducted by the semiconductor body via the load current path. 8. The semiconductor device of claim 1 , wherein the sensor electrode forms a capacitor with at least a section of the semiconductor body that is traversed by the load current path. 9. The semiconductor device of claim 8 , further comprising an insulation structure configured to electrically insulate each of the control electrode and the sensor electrode from each of the first load terminal and the semiconductor body, and wherein: the sensor electrode forms a first electrode of the capacitor; the section of the semiconductor body forms a second electrode of the capacitor; and the insulation structure electrically isolates the first electrode and the second electrode from each other. 10. A circuit arrangement comprising a semiconductor device, a driver, a system controller, and an evaluation unit, wherein: the semiconductor device comprises: a first load terminal, a second load terminal and a semiconductor body coupled to the first load terminal and the second load terminal, wherein the semiconductor body is configured to conduct a load current along a load current path between the first load terminal and the second load terminal; a control electrode electrically insulated from the semiconductor body and configured to control the load current path; and an electrically floating sensor electrode, wherein the sensor electrode is electrically insulated from each of the semiconductor body and the control electrode and is capacitively coupled to the load current path; the driver comprises a control signal output electrically coupled to the control electrode; the evaluation unit comprises a sensor signal input electrically coupled to the sensor electrode and configured to receive a sensor signal from the sensor electrode; the system controller is configured to control the driver; the evaluation unit is configured to provide a result signal derived from the received sensor signal to at least one of the driver and the system controller. 11. The circuit arrangement of claim 10 , wherein the evaluation unit is configured to set the sensor signal input in a high impedance state. 12. The circuit arrangement of claim 10 , wherein the evaluation unit comprises a controllable filter device configured to filter the received sensor signal. 13. A method of controlling a semiconductor device, the semiconductor device having a semiconductor body being configured to operate in each of a conducting state, during which a load current is conducted in a load current path between a first load terminal and a second load terminal of the semiconductor device, and in a blocking state, during which a voltage applied between the first load terminal and the second load terminal is blocked and flow of the load current is prevented, the method comprising: outputting, by means of a control unit, a control signal to a control electrode of the semiconductor device for setting the semiconductor device in one of the conducting state and the blocking state; receiving, from an electrically floating sensor electrode that is electrically insulated from each of the semiconductor body and the control electrode and that is capacitively coupled to the load current path, a sensor signal, the sensor signal being indicative for a magnitude of the load current conducted by the semiconductor body; comparing, by means of an evaluation unit the received sensor signal with a first threshold value range within a first time interval; determining a result signal in dependence of the comparison; and outputting result signal to the control unit, wherein the outputting comprises: outputting the result signal such that it is indicative for a first operational state of the semiconductor device if the sensor signal is out of the first threshold value range during the first time interval; and outputting the result signal such that it is indicative for a second operational state of the semiconductor device if the sensor signal is within the first threshold value range. 14. The method of claim 13 , further comprising: filtering the sensor signal by means of a filter device that has a controllable filter characteristic; and controlling the filter characteristic. 15. The method of claim 14 , wherein controlling the filter characteristic is carried out in dependence of at least one of the actual operational state of the semiconductor device indicated by the output result signal and a timing related to a transition between the first operational state and the second operational state. 16. A circuit arrangement comprising a semiconductor device, a driver and an evaluation unit, wherein: the semiconductor device comprises: a first load terminal, a second load terminal and a semiconductor body coupled to the first load terminal and the second load terminal, wherein the semiconductor body is configured to conduct a load current along a load current path between the first load terminal and the second load terminal; a control electrode electrically insulated from the semiconductor body and configured to control the load current path; and an electrically floating sensor electrode, wherein the sensor electrode is electrically insulated from each of the semiconductor body and the control electrode and is capacitively coupled to the load current path; the driver comprises a control signal output electrically coupled to the control electro
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