Flip voltage follower low dropout regulator

US10152072B1 · US · B1

Patent metadata
FieldValue
Publication numberUS-10152072-B1
Application numberUS-201715828608-A
CountryUS
Kind codeB1
Filing dateDec 1, 2017
Priority dateDec 1, 2017
Publication dateDec 11, 2018
Grant dateDec 11, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A wide-tuning range low output impedance flip voltage follower (FVF) low dropout regulator (LDO) for large capacitor switching loads is disclosed. In some implementations, the LDO includes an operational amplifier and a FVF. The FVF can have a gain device, a source follower device, and an adaptive level shifter coupled between a drain of the source follower device and a gate of the gain device.

First claim

Opening claim text (preview).

What is claimed is: 1. A low dropout regulator (LDO), comprising: an operational amplifier having an output, a positive input, and a negative input; a flip voltage follower (FVF) having a gain device, a source follower device, and an adaptive level shifter coupled between a drain of the source follower device and a gate of the gain device; and a plurality of replica FVFs, each of the plurality of replica FVFs having a replica gain device; a replica source follower device having a source to output an output voltage, and a gate coupled to the output of the operational amplifier; and a replica adaptive level shifter coupled between a drain of the replica source follower device and a gate of the replica gain device, wherein the replica adaptive level shifter comprises a third diode coupled between the drain of the replica source follower device and the gate of the replica gain device; a replica compensation capacitor coupled between the drain of the replica source follower and the gate of the replica gain device; and a fourth diode coupled between the gate of the replica gain device and a power rail. 2. The LDO of claim 1 , wherein a gate of the source follower device is coupled to the output of the operational amplifier and a drain of the gain device is coupled to the negative input of the operational amplifier. 3. The LDO of claim 1 , wherein the adaptive level shifter comprises: a first diode coupled between the drain of the source follower device and the gate of the gain device; a compensation capacitor coupled between the drain of the source follower and the gate of the gain device; and a second diode coupled between the gate of the gain device and a power rail. 4. The LDO of claim 3 , wherein the source follower device is an n-type metal oxide semiconductor (nMOS) M1, the gain device is an nMOS M2, and the power rail is Vss. 5. The LDO of claim 1 , wherein the replica source follower device is an n-type metal oxide semiconductor device (nMOS), the replica gain device is an nMOS, and the power rail is Vss.

Assignees

Inventors

Classifications

  • G05F1/59Primary

    including plural semiconductor devices as final control devices for a single load · CPC title

  • sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor (G05F1/563 takes precedence) · CPC title

  • characterised by reference voltage circuitry, e.g. soft start, remote shutdown · CPC title

  • characterised by the feedback circuit · CPC title

  • for the simultaneous control of series or parallel connected semiconductor devices · CPC title

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Frequently asked questions

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What does patent US10152072B1 cover?
A wide-tuning range low output impedance flip voltage follower (FVF) low dropout regulator (LDO) for large capacitor switching loads is disclosed. In some implementations, the LDO includes an operational amplifier and a FVF. The FVF can have a gain device, a source follower device, and an adaptive level shifter coupled between a drain of the source follower device and a gate of the gain device.
Who is the assignee on this patent?
Qualcomm Inc
What technology area does this patent fall under?
Primary CPC classification G05F1/59. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Dec 11 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).