Integrated circuits with laterally diffused metal oxide semiconductor structures and methods for fabricating the same
US-2015340428-A1 · Nov 26, 2015 · US
US10141401B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10141401-B2 |
| Application number | US-201715606302-A |
| Country | US |
| Kind code | B2 |
| Filing date | May 26, 2017 |
| Priority date | Oct 27, 2015 |
| Publication date | Nov 27, 2018 |
| Grant date | Nov 27, 2018 |
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A method for forming a semiconductor device structure is provided. The method includes performing a first plasma etching process on a substrate to form a first trench in the substrate. The method includes removing a second portion of the substrate under the bottom surface to form a second trench under and connected to the first trench. The second trench surrounds a third portion of the substrate under the first portion. The third portion has a first sidewall. The first sidewall is inclined relative to the top surface at a second angle, and the first angle is greater than the second angle. The method includes forming an isolation structure in the first trench and the second trench. The method includes forming a gate insulating layer over the top surface and the first inclined surface. The method includes forming a gate over the gate insulating layer and the isolation structure.
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What is claimed is: 1. A method for forming a semiconductor device structure, comprising: performing a first plasma etching process on a substrate to form a first trench in the substrate, wherein the first plasma etching process uses a first etching gas and a first deposition gas, the first trench surrounds a first portion of the substrate, the first portion has a top surface and a first inclined surface, the first inclined surface connects the top surface to a bottom surface of the first trench, and the first inclined surface is inclined relative to the top surface at a first angle; removing a second portion of the substrate under the bottom surface to form a second trench under and connected to the first trench, wherein the second trench surrounds a third portion of the substrate under the first portion, the third portion has a first sidewall, the first sidewall is inclined relative to the top surface at a second angle, and the first angle is greater than the second angle; forming an isolation structure in the first trench and the second trench, wherein the isolation structure has a second inclined surface, and the first inclined surface and the second inclined surface form second sidewalls of a recess; forming a gate insulating layer over the top surface and the first inclined surface, wherein the gate insulating layer extends into the recess and partially covers the second inclined surface, the recess is filled with the gate and the gate insulating layer, and the gate is over the isolation structure partially; and forming a gate over the gate insulating layer and the isolation structure, wherein the gate crosses the first portion, and the gate extends into the recess. 2. The method for forming a semiconductor device structure as claimed in claim 1 , wherein the first deposition gas comprises CH 2 F 2 , CH 3 F, or CHF 3 . 3. The method for forming a semiconductor device structure as claimed in claim 1 , wherein the formation of the first trench comprises: forming a mask layer over the substrate, wherein the mask layer has an opening exposing a fourth portion of the substrate; and performing the first plasma etching process to remove the fourth portion of the substrate through the opening so as to form the first trench. 4. The method for forming a semiconductor device structure as claimed in claim 3 , wherein the formation of the second trench comprises: performing a second plasma etching process to remove the second portion of the substrate through the opening and the first trench so as to form the second trench. 5. The method for forming a semiconductor device structure as claimed in claim 4 , wherein the second plasma etching process uses a second etching gas and a second deposition gas. 6. The method for forming a semiconductor device structure as claimed in claim 5 , wherein the second deposition gas comprises CH 2 F 2 , CH 3 F, or CHF 3 . 7. The method for forming a semiconductor device structure as claimed in claim 5 , wherein the formation of the isolation structure comprises: forming an insulating layer over the mask layer and in the opening, the first trench, and the second trench; removing the insulating layer outside of the opening, the first trench, and the second trench; and removing the mask layer. 8. A method for forming a semiconductor device structure, comprising: performing a first plasma etching process on a substrate to form a first trench in the substrate, wherein the first plasma etching process uses a first etching gas and a first deposition gas, and the first trench has a bottom surface; performing a second plasma etching process on the bottom surface to form a second trench, wherein the second plasma etching process uses a second etching gas and a second deposition gas, a first concentration of the first deposition gas is greater than a second concentration of the second deposition gas; forming an isolation structure in the first trench and the second trench; forming a gate insulating layer over the substrate; and forming a gate over the gate insulating layer, wherein the first trench has a first sidewall with a first slope, the second trench has a second sidewall with a second slope, and the first slope is less than second slope, the isolation structure has an inclined surface, the first sidewall and the inclined surface form third sidewalls of a recess, the gate insulating layer extends into the recess and partially covers the inclined surface, the gate extends into the recess, the recess is filled with the gate and the gate insulating layer, and the gate is over the isolation structure partially. 9. The method for forming a semiconductor device structure as claimed in claim 8 , wherein the first deposition gas comprises CH 2 F 2 , CH 3 F, or CHF 3 . 10. The method for forming a semiconductor device structure as claimed in claim 9 , wherein the first deposition gas and the second deposition gas comprise a same deposition gas. 11. The method for forming a semiconductor device structure as claimed in claim 8 , wherein the formation of the first trench and the second trench comprises: forming a mask layer over the substrate, wherein the mask layer has an opening exposing a first portion of the substrate; performing the first plasma etching process to remove the first portion of the substrate through the opening so as to form the first trench; and performing the second plasma etching process to remove a second portion of the substrate under the bottom surface through the opening and the first trench so as to form the second trench. 12. A method for forming a semiconductor device structure, comprising: performing a first plasma etching process on a substrate to form a first trench in the substrate, wherein the first plasma etching process uses a first etching gas and a first deposition gas, the first trench surrounds a first portion of the substrate, the first portion has a top surface and a first inclined surface, the first inclined surface connects the top surface to a bottom surface of the first trench, and the first inclined surface is inclined relative to the top surface at a first angle; removing a second portion of the substrate under the bottom surface to form a second trench under and connected to the first trench, wherein the second trench surrounds a third portion of the substrate under the first portion, the third portion has a first sidewall, the first sidewall is inclined relative to the top surface at a second angle, and the first angle is greater than the second angle; forming an isolation structure in the first trench and the second trench; after the formation of the isolation structure, performing an oxidation process on the substrate to form a continuous gate insulating layer on the top surface and the first inclined surface; and forming a gate over the gate insulating layer and the isolation structure, wherein the gate crosses the first portion, wherein the isolation structure has a second inclined surface, the first inclined surface and the second inclined surface form second sidewalls of a recess, the gate insulating layer extends into the recess and partially covers the second inclined surface, the gate extends into the recess, the recess is filled with the gate and the gate insulating layer, and the gate is over the isolation structure partially. 13. The method for forming a semiconductor device structure as claimed in claim 12 , wherein during the oxidation process, a first oxidation rate of the substrate constituting the first inclined surface is greater than a second oxidation rate of the substrate constituting the top surface. 14. The method for forming a semi
characterised by their behaviour during the process, e.g. soluble masks or redeposited masks · CPC title
comprising alternated and repeated etching and passivation steps · CPC title
of Group IV materials · CPC title
Aspects related to lithography, isolation or planarisation of the conductor · CPC title
of trenches having shapes other than rectangular or V-shape (H10W10/0143 takes precedence) · CPC title
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