Power semiconductor device
US-9620631-B2 · Apr 11, 2017 · US
US10141304B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10141304-B2 |
| Application number | US-201415029583-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jul 17, 2014 |
| Priority date | Dec 17, 2013 |
| Publication date | Nov 27, 2018 |
| Grant date | Nov 27, 2018 |
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Official abstract text for this publication.
A small semiconductor device having a diode forward voltage less likely to change due to a gate potential is provided. An anode and an upper IGBT structure (emitter and body) are provided in a range in the substrate exposed at the upper surface. A trench, a gate insulating film, and a gate electrode extend along a border of the anode and the upper IGBT structure. Cathode and collector are provided in a range in the substrate exposed at the lower surface. A drift is provided between an upper structure and a lower structure. A crystal defect region extends across the drift above the cathode and the drift above the collector. When a thickness of the substrate is defined as x [μm] and a width of a portion of the crystal defect region that protrudes above the cathode is defined as y [μm], y≥0.007x2−1.09x+126 is satisfied.
Opening claim text (preview).
The invention claimed is: 1. A semiconductor device comprising: a semiconductor substrate; an upper electrode provided on an upper surface of the semiconductor substrate; and a lower electrode provided on a lower surface of the semiconductor substrate; wherein an anode region and an upper Insulated Gate Bipolar Transistor (IGBT) structure are provided in a range in the semiconductor substrate that is exposed at the upper surface, a trench is provided in the upper surface, the anode region is separated from the upper IGBT structure by the trench, the anode region is in contact with the trench, and the upper IGBT structure is in contact with the trench, the anode region is a p-type region connected to the upper electrode, the upper IGBT structure includes an n-type emitter region and a p-type body region, the emitter region connected to the upper electrode, and the body region being in contact with the emitter region and connected to the upper electrode, a gate insulating film and a gate electrode are provided in the trench, a cathode region and a collector region are provided in a range in the semiconductor substrate that is exposed at the lower surface, the cathode region bordering the collector region at an interface; the cathode region is an n-type region connected to the lower electrode and provided in at least a part of a region below the anode region, the collector region is a p-type region connected to the lower electrode, provided in at least a part of a region below the upper IGBT structure, and being in contact with the cathode region, an n-type drift region is provided between an upper structure including the anode region and the upper IGBT structure and a lower structure including the cathode region and the collector region, a crystal defect region is provided across a portion of the drift region that is above the cathode region and a portion of the drift region that is above the collector region so that the crystal defect region is provided in a part of the portion of the drift region that is above the collector region, the crystal defect region having a density of crystal defects higher than a density of crystal defects in a surrounding region of the crystal defect region, the semiconductor substrate has a dimension that satisfies a relationship of y≥0.007x2−1.09x+126 within a range of 165 μm≥x≥60 μm, where x is a number in the unit of μm and represents a thickness of the semiconductor substrate and y is a number in the unit of μm and represents a width of a portion of the crystal defect region that protrudes along a direction parallel to the upper surface of the semiconductor substrate from the portion of the drift region that is above the cathode region to the portion of the drift region that is above the collector region, the trench and the interface are separate from each other when viewed in plan view, with the trench above the collector region and the interface below the anode region and without the interface directly below the trench, such that the anode region extends toward the upper IGBT structure more than the cathode region does, and the portion of the crystal defect region does not protrude beyond the trench to a portion of the drift region that is below the upper IGBT structure.
using cavities formed by hydrogen or noble gas ion implantation · CPC title
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