Adjusting drive strength for driving transistor device

Patent metadata

Field	Value
Publication number	US-10135430-B2
Application number	US-201615272035-A
Country	US
Kind code	B2
Filing date	Sep 21, 2016
Priority date	Jan 19, 2016
Publication date	Nov 20, 2018
Grant date	Nov 20, 2018

Abstract

A system that can include a detector that can monitor a voltage at an input of a transistor device over a period of time and provide a signal having a value representative of a capacitance between the input and an output of the transistor device. The system can further include a driver that can have a programmable drive strength and be coupled to input of the transistor device to drive the transistor device at the input thereof. The system can further include a controller that can configure the driver based on the signal to drive the transistor device with a corresponding drive strength.

First claim

What is claimed is:

1. A system comprising:
a detector to monitor a voltage of an output node, which is couplable to input of a transistor device, over a period of time and to provide a signal having a value related to an intrinsic capacitance between the input and one output of the transistor device;
a driver couplable to drive the input of the transistor device via the output node, the driver having a programmable drive strength; and
a controller to configure the driver based on the signal to drive the transistor device with a corresponding drive strength.

2. The system of claim 1 , wherein the driver comprises a plurality of driver segments, the controller configuring the driver by enabling a discrete number of the plurality of driver segments based on the signal.

3. The system of claim 1 , further comprising a current source to provide a fixed current to the output node to establish the voltage at the input of the transistor device.

4. The system of claim 3 ,
wherein, during a calibration mode, the controller disables each of the plurality of driver segments of the driver; and
wherein, during the calibration mode, the current source provides the fixed current to the output node and the detector monitors the voltage at the output node, corresponding to input of the transistor device, over time while the plurality of driver segments are disabled.

5. The system of claim 2 , wherein the detector further comprises:
a comparator to compare the monitored voltage to a threshold reference voltage and to provide a comparator output signal indicating when the monitored voltage is substantially equal to or greater than the threshold reference voltage; and
a timer to provide a timer signal having a timer value related to the intrinsic capacitance between the input and the one output of the transistor device in response to the comparator output signal,
wherein the controller programs the corresponding drive strength of the driver based on the timer signal.

6. The system of claim 5 ,
wherein the timer signal is a digital representation of the period of time; and
wherein the controller is to selectively enable based on the timer value of the timer signal the discrete number of the plurality of driver segments to drive the transistor device at the corresponding drive strength.

7. The system of claim 6 , wherein the controller:
compares the digital representation of the timer value relative to a one or more reference timer values associated with different drive strengths; and
determines the discrete number of driver segments to enable such that the driver drives the transistor device at the corresponding drive strength in response to the comparison.

8. The system of claim 2 , wherein the detector further comprises:
a timer to generate a monitoring control signal in response to a start timer signal;
a voltage monitoring circuit to provide an analog voltage signal having a voltage value related to the intrinsic capacitance between the input and the output of the transistor device in response to the monitoring control signal; and
an analog-to-digital converter to convert the analog monitored voltage signal to a corresponding digital monitored voltage signal,
wherein the controller selectively enables the discrete number of the plurality of driver segments of the driver based on a corresponding digital voltage value of the digital monitored voltage signal.

9. The system of claim 8 , wherein the controller:
compares the corresponding digital voltage value to one or more digital voltage references associated with different drive strengths; and
controls the discrete number of driver segments of the driver to enable based on the comparison such that the driver drives the transistor device at the corresponding drive strength.

10. The system of claim 1 , wherein the transistor device comprises one or more field effect transistors.

11. The system of claim 1 ,
wherein the input of the transistor device is a gate of the transistor device; and
wherein the one output of the transistor device is a source of the transistor device.

12. An integrated circuit chip comprising the system of claim 1 .

13. The system of claim 2 ,
wherein on power-up of the driver, the controller enters a calibration mode and disables each of the plurality of driver segments of the driver; and
wherein the controller, during the calibration mode, selectively enables the discrete number of driver segments of the plurality of driver segments of the driver based on the signal for driving the transistor device at the corresponding drive strength during a normal operating mode following the calibration mode.

14. A system comprising:
a plurality of drivers, each of the plurality of drivers comprising a plurality of driver segments coupled to drive an output node, which is couplable to an input of a respective transistor device;
a detector that provides a value based on monitoring a voltage of the output node in response to current provided to the output node for delivery to the input of the respective transistor device over a time interval, wherein the value is related to a capacitance between the input and an output of the respective transistor device; and
a controller that selectively enables a portion of the plurality of driver segments of each of the plurality of drivers based on the value to drive each respective transistor device at a corresponding drive strength.

15. The system of claim 14 , further comprising a current source coupled to supply a fixed current to the output node for delivery to input of the at least one transistor device during a measurement interval of a calibration mode, wherein the controller sets the plurality of driver segments of each driver in a disabled state during the measurement interval of the calibration mode.

16. The system of claim 14 ,
wherein the detector is to monitor a respective voltage at the output node being supplied to the input of each transistor device and to provide a respective value related to the capacitance between an input and a respective output of each respective transistor device; and
wherein the controller is to selectively enable based on the respective value a portion of the plurality of driver segments of each driver to drive the respective transistor device at a given drive strength.

17. The system of claim 15 , wherein the respective the transistor device comprises one or more field effect transistors.

18. The system of claim 15 ,
wherein the detector provides to the controller a signal comprising one of a timer value and a voltage value related to the capacitance between the input and the output of the respective transistor device; and
wherein the controller configures each of the drivers to set the corresponding drive strength in response to the signal.

19. A method comprising:
monitoring a voltage of an input of at least one transistor device in response to current provided to the input over a time interval;
providing a signal based on the monitored voltage of the input, the signal having a value related to a capacitance between the input and an output of the at least one transistor device; and
setting a drive strength of a driver that is coupled to the input of the at least one driver based on the signal to drive the at least one transistor device with a corresponding drive strength.

20. The method of claim 19 ,
wherein the driver includes a plurality of driver segments; and
wherein setting the drive strength further comprises enabling a number of the plurality

Assignees

• Texas Instruments Inc

Inventors

• Chen Suheng
• Mavencamp Daniel Andrew
• Li Wang

Classifications

• H03K17/687

  the devices being field-effect transistors · CPC title

• H03K5/19 Primary

  Monitoring patterns of pulse trains (indicating amplitude G01R19/00; indicating frequency G01R23/00; measuring characteristics of individual pulses G01R29/02) · CPC title

• H03K17/04123 Primary

  in field-effect transistor switches · CPC title

• H03K19/018557 Primary

  Coupling arrangements; Impedance matching circuits · CPC title

• H03K17/163

  Soft switching · CPC title