Micro device integration into system substrate

US10134803B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10134803-B2
Application numberUS-201615060942-A
CountryUS
Kind codeB2
Filing dateMar 4, 2016
Priority dateJan 23, 2015
Publication dateNov 20, 2018
Grant dateNov 20, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Post-processing steps for integrating of micro devices into system (receiver) substrate or improving the performance of the micro devices after transfer. Post processing steps for additional structures such as reflective layers, fillers, black matrix or other layers may be used to improve the out coupling or confining of the generated LED light. Dielectric and metallic layers may be used to integrate an electro-optical thin film device into the system substrate with transferred micro devices. Color conversion layers may be integrated into the system substrate to create different outputs from the micro devices.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of integrated device fabrication, the device comprising a plurality of pixels, each comprising at least one light emitting micro device and a thin-film light emitting electro-optical device integrated on a receiver substrate, the method comprising: mounting a first and a second contact pad on the receiver substrate for each micro device and each thin-film electro-optical device, respectively; integrating the at least one light emitting micro device onto the receiver substrate; forming a dielectric layer around each micro device and covering the first and second contact pad; subsequent to the integration of the at least one micro device, integrating at the least one thin-film light emitting electro-optical device onto the receiver substrate including forming a bottom electrode for each thin-film electro-optical device extending from the second contact pad through the dielectric layer and along a top of the dielectric layer; and integrating at least one reflector capable of directing light from each micro device and each thin-film electro-optical device in a same direction. 2. The method according to claim 1 , wherein integrating the at least one thin-film electro-optical device comprises: forming a top electrode over the thin-film electro-optical device; and forming an opening for light from the micro device through at least one of the bottom electrode and the top electrode. 3. The method according to claim 1 , wherein each of the first contact pad are transparent; whereby an optical path for the micro device is through the receiver substrate. 4. The method according to claim 1 , further comprising: covering each micro device with a planarization layer; and fabricating the top electrode which serves as a shared electrode for both one of the thin-film electro-optical device and one of the light emitting micro device, wherein a portion of the shared top electrode extends through an opening in the planarization layer into contact with the micro device; and wherein the thin-film electro-optical device is formed selectively to not cover the opening. 5. The method according to claim 1 , wherein each second contact pad is extended to form the at least one reflector for reflecting light from the micro device and the thin-film electrooptical device. 6. The method according to claim 1 , wherein the at least one reflector comprises a reflective layer on the receiver substrate. 7. A method of integrated device fabrication, the device comprising a plurality of pixels, each comprising at least one micro device and a thin-film electro-optical device, integrated on a receiver substrate, the method comprising: integrating at least one light emitting micro device onto the receiver substrate; subsequent to the integration of the at least one light emitting micro device, integrating at least one thin film light emitting electro-optical device onto the receiver substrate including a top and a bottom electrode; and integrating at least one reflector capable of directing light from each light emitting micro device and each thin-film light emitting electro-optical device in a same direction; wherein integrating the at least one thin-film light emitting electro-optical device comprises forming an opening for light from the light emitting micro device through at least one of the top electrode and the bottom electrode. 8. The method according to claim 7 , wherein each second contact pad is extended to form the at least one reflector for reflecting light from the micro device and the thin-film electro-optical device. 9. The method according to claim 7 , wherein the at least one reflector comprises a reflective layer on the receiver substrate.

Assignees

Inventors

Classifications

  • Subject matter not provided for in other groups of this subclass · CPC title

  • batch processes · CPC title

  • Bond pads specially adapted therefor · CPC title

  • on encapsulations · CPC title

  • Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps · CPC title

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Frequently asked questions

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What does patent US10134803B2 cover?
Post-processing steps for integrating of micro devices into system (receiver) substrate or improving the performance of the micro devices after transfer. Post processing steps for additional structures such as reflective layers, fillers, black matrix or other layers may be used to improve the out coupling or confining of the generated LED light. Dielectric and metallic layers may be used to int…
Who is the assignee on this patent?
Vuereal Inc
What technology area does this patent fall under?
Primary CPC classification H01L27/156. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 20 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).