Methods for producing semiconductor devices

Patent metadata

Field	Value
Publication number	US-10134636-B2
Application number	US-201715818913-A
Country	US
Kind code	B2
Filing date	Nov 21, 2017
Priority date	Jul 22, 2013
Publication date	Nov 20, 2018
Grant date	Nov 20, 2018

Abstract

A method for producing a semiconductor device in accordance with various embodiments may include providing a semiconductor workpiece attached to a first carrier; dicing the semiconductor workpiece and the carrier so as to form at least one individual semiconductor chip; mounting the at least one semiconductor chip with a side facing away from the carrier, to an additional carrier.

First claim

The invention claimed is:

1. A method for producing a semiconductor device, the method comprising:
providing a semiconductor workpiece having a carrier attached to a first side of the semiconductor workpiece and having a metal layer applied to a second side of the semiconductor workpiece, the metal layer comprising a contiguous portion;
forming at least one metal block over the metal layer, comprising forming a plurality of metal blocks on a back side of the contiguous portion of the metal layer facing away from the semiconductor workpiece, the plurality of metal blocks spaced apart in a direction parallel to the back side of the contiguous portion of the metal layer; and
forming an encapsulation layer over at least one of the metal layer and the at least one metal block to at least partially encapsulate the at least one metal block.

2. The method of claim 1 , further comprising:
removing the carrier from the semiconductor workpiece after forming the encapsulation layer.

3. The method of claim 1 , wherein forming the encapsulation layer over at least one of the metal layer and the at least one metal block comprises forming the encapsulation layer over the metal layer and the at least one metal block, the method further comprising:
thinning the encapsulation layer to expose the at least one metal block.

4. The method of claim 3 , further comprising: removing the carrier from the semiconductor workpiece after thinning the encapsulation layer.

5. The method of claim 4 , wherein the encapsulation layer comprises a mold compound.

6. The method of claim 3 , wherein thinning the molding layer comprises grinding the molding layer.

7. The method of claim 1 , wherein the semiconductor workpiece comprises silicon carbide.

8. The method of claim 1 , wherein the metal block comprises copper.

9. The method of claim 1 , wherein the metal block comprises a copper pad covered with a metal layer.

10. The method of claim 9 , wherein the metal layer comprises tin or silver.

11. The method of claim 1 , wherein metal layer covers an entirety of the second side of the semiconductor workpiece.

12. The method of claim 1 , wherein the semiconductor workpiece comprises one or more semiconductor devices, the one or more semiconductor devices comprising a transistor.

13. A method comprising:
providing a stack comprising:
a thin semiconductor layer;
an epitaxial layer formed on a front side of the thin semiconductor layer, the epitaxial layer having one or more semiconductor devices;
a metal layer formed on a back side of the thin semiconductor layer;
a carrier layer attached to the epitaxial layer;
forming on the metal layer, at least one metal block;
applying a molding layer over the least one metal block and the metal layer;
thinning the molding to expose the at least one metal block; and
removing the carrier layer from the stack.

14. The method of claim 13 , further comprising:
dicing the stack to form one or more individual semiconductor chips.

15. The method of claim 13 , further comprising:
mounting the stack on a lead frame.

16. The method of claim 13 , wherein thinning the molding layer comprises grinding the molding layer down to the metal block.

17. The method of claim 13 , wherein the thin semiconductor layer comprises silicon carbide.

18. The method of claim 13 , wherein the epitaxial layer comprises silicon carbide.

19. The method of claim 13 , wherein the thin semiconductor layer has a thickness 5 μm to 15 μm, wherein the thickness is measured vertically from the front side to the back side of the thin semiconductor layer.

20. The method of claim 13 , wherein the metal block comprises a copper pad covered with a covering metal layer.

21. The method of claim 20 , wherein the covering metal layer comprises tin or silver.

22. The method of claim 20 , the metal block further comprising a base layer disposed between the covering metal layer and the metal layer.

23. The method of claim 13 , wherein the metal block has a thickness of 50 μm to 1 mm, wherein the thickness is measured vertically from a first side of the metal block facing the metal layer to a second side of the metal block opposite to the first side.

Assignees

• Infineon Technologies Austria Ag

Inventors

• Voerckel Andreas

Classifications

• H10W74/00

  Encapsulations, e.g. protective coatings · CPC title

• H10W72/07307

  the auxiliary member being a temporary substrate, e.g. a removable substrate · CPC title

• H10W90/736

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10P72/7434

  used in a transfer process involving at least two transfer steps, i.e. including an intermediate handle substrate · CPC title

• H10P72/7426

  used as a support during build up manufacturing of active devices · CPC title