Semiconductor apparatus and reduced current and power consumption

Patent metadata

Field	Value
Publication number	US-10128844-B2
Application number	US-201514847285-A
Country	US
Kind code	B2
Filing date	Sep 8, 2015
Priority date	Dec 3, 2013
Publication date	Nov 13, 2018
Grant date	Nov 13, 2018

Abstract

A semiconductor apparatus may include a mode control circuit configured to output differential output signals which swing in a current mode logic (CML) area and a first control signal, in response to a power-down mode signal; a first circuit unit configured to be provided with the differential output signals, and operate in a power-down mode; and a second circuit unit configured to be provided with the differential output signals, and be interrupted in its operation in the power-down mode.

First claim

What is claimed is:

1. The semiconductor apparatus comprising:
a control signal generation unit configured to output a first control signal and a second control signal in response to a power-down mode signal; and
a CML circuit unit configured to generate first and second output signals which swing in a current mode logic (CML) area, as differential output signals, in response to the second control signal,
wherein the second control signal determines an amount of current to be sunken through the CML circuit unit so that an amount of current to be sunken through the CML circuit unit in the power-down mode differs from an amount of current to be sunken through the CML circuit unit in a normal mode,
wherein the CML circuit unit comprises:
a swing width control section configured to be electrically coupled between a terminal of a power supply voltage and a first output node to which the first output signal is applied, and between the terminal of the power supply voltage and a second output node to which the second output signal is applied.

2. The semiconductor apparatus according to claim 1 , wherein the CML circuit unit further comprises:
an input section configured to be provided with the first input signal between the first output node and a common node, and be provided with the second input signal between the second output node and the common node;
a first current control section configured to be electrically coupled between the common node and a ground terminal, and be driven in response to an operation enable signal; and
a second current control section configured to be driven in response to the second control signal.

3. The semiconductor apparatus according to claim 2 , wherein the first current control section comprises:
a first switching part which determines the amount of current to be sunken through the CML circuit unit in the power-down mode.

4. The semiconductor apparatus according to claim 3 , wherein the second current control section comprises:
a second switching part configured to determine the amount of current sunken through the CML circuit unit in the normal mode, in response to the second control signal.

5. The semiconductor apparatus according to claim 4 , wherein the CML circuit unit further comprises:
a third switching part configured to be electrically coupled between the first current control section and the ground terminal, and be driven by a bias voltage.

6. The semiconductor apparatus according to claim 5 , wherein the CML circuit unit further comprises:
a fourth switching part configured to be electrically coupled between the second current control section and the ground terminal, and be driven by the bias voltage.

7. The semiconductor apparatus according to claim 2 , wherein a resistance by the first current control section is designed to be greater than a resistance by the second current control section.

8. The semiconductor apparatus according to claim 2 , wherein the swing width control section comprises:
a first resistor element configured to be electrically coupled between the terminal of the power supply voltage and the first output node; and
a second resistor element configured to be electrically coupled between the terminal of the power supply voltage and the second output node.

9. The semiconductor apparatus according to claim 2 , wherein the swing width control section comprises:
a first swing width controller configured to control a current path between the terminal of the power supply voltage and the first output node in response to the second control signal; and
a second swing width controller configured to control a current path between the terminal of the power supply voltage and the second output node in response to the second control signal.

10. The semiconductor apparatus according to claim 9 , wherein the first swing width controller comprises:
a first path control part configured to define a first current path in response to the second control signal; and
a second path control part configured to be electrically coupled in parallel to the first path control part.

11. The semiconductor apparatus according to claim 10 , wherein a resistance by the second path control part is configured to be greater than a resistance by the first path control part.

12. The semiconductor apparatus according to claim 10 , wherein the second swing width controller comprises:
a third path control part configured to define a second current path in response to the second control signal; and
a fourth path control part configured to be electrically coupled in parallel to the third path control part.

13. The semiconductor apparatus according to claim 12 , wherein a resistance by the fourth path control part is configured to be greater than a resistance by the third path control part.

14. The semiconductor apparatus according to claim 12 , wherein the first path control part comprises:
a fifth switching part configured to be driven in response to the second control signal; and
a third resistor element configured to be electrically coupled between the fifth switching part and the first output node, and
wherein the second path control part comprises:
a fourth resistor element configured to be electrically coupled between the terminal of the power supply voltage and the first output node.

15. The semiconductor apparatus according to claim 14 , wherein the third path control part comprises:
a sixth switching part configured to be driven in response to the second control signal; and
a fifth resistor element configured to be electrically coupled between the sixth switching part and the second output node, and
wherein the fourth path control part comprises:
a sixth resistor element configured to be electrically coupled between the terminal of the power supply voltage and the second output node.

Assignees

• Sk Hynix Inc

Inventors

• Lee Hyun Woo

Classifications

• H03K3/012

  Modifications of generator to improve response time or to decrease power consumption · CPC title

• H03K3/356034

  the input circuit having a differential configuration · CPC title

• H03K19/0008 Primary

  Arrangements for reducing power consumption · CPC title

• H03K19/09436

  Source coupled field-effect logic [SCFL] · CPC title

• H03K19/08

  using semiconductor devices (H03K19/173 takes precedence; wherein the semiconductor devices are only diode rectifiers H03K19/12) · CPC title