Gain calibration for an imaging system

US10128808B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10128808-B2
Application numberUS-201715455007-A
CountryUS
Kind codeB2
Filing dateMar 9, 2017
Priority dateAug 20, 2014
Publication dateNov 13, 2018
Grant dateNov 13, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An imaging system includes an array of photodetectors and electronic circuitry associated with the photodetectors to read intensity values from the photodetectors. The electronic circuitry can include an integrator with an integrator capacitor having a nominal capacitance, wherein a gain of the electronic circuitry associated with a photodetector can depend at least in part on the actual capacitance of the integrator capacitor, the actual capacitance differing from the nominal capacitance. The imaging system can be configured to determine a gain factor that depends at least in part on the actual capacitance and/or a signal voltage input to the integrator. The imaging system can be configured to apply the gain factor based at least in part on the actual capacitance of the integrator capacitor calculated. The imaging system can be a thermal imaging system and may include an infrared camera core.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for calibration of a circuit on a microfabricated chip, the circuit comprising a capacitor having a nominal capacitance, wherein an input/output relationship of the circuit is based on the nominal capacitance of the capacitor and is used by a processing system, the method comprising: measuring an actual output signal of the circuit as a function of an input voltage of the circuit during calibration of the circuit; determining an actual input/output relationship between the actual output signal of the circuit and an actual capacitance of the capacitor, based on determining the actual capacitance as a function of the input voltage during calibration; and modifying the nominal capacitance contribution to the input/output relationship used by the processing system using the actual capacitance, wherein the output signal is an input to determining the actual capacitance during operation of the circuit, wherein the actual capacitance of the capacitor is variable based on a voltage across the capacitor, the voltage across the capacitor being based at least in part on the input voltage of the circuit. 2. The method of claim 1 , wherein determining the actual capacitance comprises: varying the input voltage over a plurality of known values; observing the output signal at the plurality of input voltages; comparing the output signal to an expected output signal corresponding to the nominal capacitance; and calculating the actual capacitance as a function of the output signal. 3. The method of claim 2 , wherein determining the actual capacitance further comprises fitting a curve to the determined actual capacitance as a function of the output signal. 4. The method of claim 1 further comprising developing a look up table that indexes the actual input/output relationship to the actual output signal, wherein the look up table is based on modification of the input/output relationship due to the actual capacitance. 5. The method of claim 1 , wherein the actual input/output relationship is updated on a substantially continuous basis during operation of the circuit. 6. A system comprising: a microfabricated chip, the microfabricated chip having a circuit thereon, the circuit comprising a capacitor having a nominal capacitance, wherein an input/output relationship of the circuit is based on the nominal capacitance; and a processor in communication with the microfabricated chip and configured to use the input/output relationship of the circuit, wherein the system is configured to calibrate the circuit by: measuring an actual output signal of the circuit of the circuit as a function of an input voltage of the circuit during calibration of the circuit; determining an actual input/output relationship between the actual output signal of the circuit and an actual capacitance of the capacitor, based on determining the actual capacitance as a function of the input voltage during calibration; and modifying the nominal capacitance contribution to the input/output relationship used by the processor using the actual capacitance, wherein the output signal is an input to determining the actual capacitance during operation of the circuit, wherein the actual capacitance of the capacitor is variable based on a voltage across the capacitor, the voltage across the capacitor being based at least in part on the input voltage of the circuit. 7. The system of claim 6 , wherein determining the actual capacitance comprises: varying the input voltage over a plurality of known values; observing the output signal at the plurality of input voltages; comparing the output signal to an expected output signal corresponding to the nominal capacitance; and calculating the actual capacitance as a function of the output signal. 8. The system of claim 7 , wherein determining the actual capacitance further comprises fitting a curve to the determined actual capacitance as a function of the output signal. 9. The system of claim 6 , wherein the processor is further configured to develop a look up table that indexes the actual input/output relationship to the actual output signal, wherein the look up table is based on modification of the input/output relationship due to the actual capacitance. 10. The system of claim 6 , wherein the actual capacitance of the capacitor is variable based on a voltage across the capacitor, the voltage across the capacitor being based at least in part on the input voltage of the circuit. 11. The system of claim 6 , wherein the processor is configured to calibrate the circuit on a substantially continuous basis during operation of the circuit. 12. The system of claim 6 , wherein the circuit is one of a plurality of circuits on the microfabricated chip, each of the plurality of circuits comprising a capacitor having a nominal capacitance and an input/output relationship based on the nominal capacitance. 13. The system of claim 12 , wherein the processor is configured to individually calibrate each of the plurality of circuits.

Assignees

Inventors

Classifications

  • H03G3/3084Primary

    in receivers or transmitters for electromagnetic waves other than radiowaves, e.g. lightwaves (H03G3/32, H03G3/34 take precedence) · CPC title

  • Plural ranges in circuit, e.g. switchable ranges; Adjusting sensitivity selecting gain values · CPC title

  • Electrical features thereof · CPC title

  • Capacitors in which the capacitance is varied by non-mechanical means; Processes of their manufacture · CPC title

  • using comparison with a reference electric value · CPC title

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What does patent US10128808B2 cover?
An imaging system includes an array of photodetectors and electronic circuitry associated with the photodetectors to read intensity values from the photodetectors. The electronic circuitry can include an integrator with an integrator capacitor having a nominal capacitance, wherein a gain of the electronic circuitry associated with a photodetector can depend at least in part on the actual capaci…
Who is the assignee on this patent?
Seek Thermal Inc
What technology area does this patent fall under?
Primary CPC classification H03G3/3084. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 13 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).