Semiconductor device and method for fabricating the same

Patent metadata

Field	Value
Publication number	US-10128236-B2
Application number	US-201615007882-A
Country	US
Kind code	B2
Filing date	Jan 27, 2016
Priority date	Mar 23, 2015
Publication date	Nov 13, 2018
Grant date	Nov 13, 2018

Abstract

A semiconductor device is provided. The semiconductor device includes a gate spacer that defines a trench on a substrate and includes an upper part and a lower part, a gate insulating film that extends along sidewalls and a bottom surface of the trench and is not in contact with the upper part of the gate spacer, a lower conductive film that extends on the gate insulating film along the sidewalls and the bottom surface of the trench and is not overlapped with the upper part of the gate spacer, and an upper conductive film on an uppermost part of the gate insulating film on the lower conductive film.

First claim

What is claimed is:

1. A semiconductor device comprising:
a first gate spacer that defines a first trench on a substrate and includes an upper part and a lower part;
a second gate spacer that defines a second trench on the substrate and includes an upper part and a lower part, a width of the second trench being greater than a width of the first trench;
a first gate insulating film that extends along sidewalls and a bottom surface of the first trench and is not in contact with the upper part of the first gate spacer;
a second gate insulating film that extends along sidewalls and a bottom surface of the second trench and is not in contact with the upper part of the second gate spacer, a height from the bottom surface of the second trench to an uppermost part of the second gate insulating film being different from a height from the bottom surface of the first trench to an uppermost part of the first gate insulating film;
a first gate electrode that includes a first lower conductive film and a first upper conductive film on the first gate insulating film, and fills at least a part of the first trench; and
a second gate electrode that includes a second lower conductive film that extends along the sidewalls and the bottom surface of the second trench and a second upper conductive film that extends on the second lower conductive film and covers the uppermost part of the second gate insulating film, and fills at least a part of the second trench, wherein the second gate electrode further includes a filling conductive film on the second upper conductive film.

2. The semiconductor device of claim 1 , wherein the first lower conductive film contains a same material as the second lower conductive film, and the first upper conductive film contains a same material as the second upper conductive film.

3. The semiconductor device of claim 1 , wherein the first lower conductive film extends along the sidewalls and the bottom surface of the first trench, and
the first upper conductive film extends on the first lower conductive film and covers the uppermost part of the first gate insulating film and an uppermost part of the first lower conductive film.

4. The semiconductor device of claim 3 , wherein the first gate electrode includes a work function adjustment film between the first gate insulating film and the first lower conductive film, and
the first lower conductive film covers an uppermost part of the work function adjustment film.

5. The semiconductor device of claim 1 , wherein the second gate electrode includes a work function adjustment film formed between the second gate insulating film and the second lower conductive film, and
a height from the bottom surface of the second trench to an uppermost part of the work function adjustment film is substantially equal to the height from the bottom surface of the second trench to the uppermost part of the second gate insulating film.

6. The semiconductor device of claim 1 , wherein the first gate electrode and the second gate electrode fill a part of the first trench and the second trench, respectively, and
the semiconductor device further comprising:
a first capping pattern that fills a remainder of the first trench on the first gate electrode; and
a second capping pattern that fills a remainder of the second trench on the second gate electrode.

7. A semiconductor device comprising:
a fin type pattern that protrudes upward from a field insulating film;
a gate spacer that defines a trench intersecting the fin type pattern on the field insulating film, and includes an upper part and a lower part;
a gate insulating film that extends along sidewalls and a bottom surface of the trench and is not in contact with the upper part of the gate spacer;
a work function adjustment film that extends on the gate insulating film along the sidewalls and the bottom surface of the trench, and is not overlapped with the upper part of the gate spacer;
a lower conductive film that extends on the work function adjustment film along the sidewalls and the bottom surface of the trench, and is not overlapped with the upper part of the gate spacer, the lower conductive film not contacting the gate spacer; and
an upper conductive film on an uppermost part of the gate insulating film and on the lower conductive film.

8. The semiconductor device of claim 7 , wherein a height from an upper surface of the field insulating film to the uppermost part of the gate insulating film is higher than a height from the upper surface of the field insulating film to an uppermost part of the fin type pattern and is lower than a height of the gate spacer.

9. The semiconductor device of claim 7 , wherein the upper conductive film extends so as to fill a remainder of the trench.

10. A semiconductor device comprising:
a first transistor gate structure comprising:
first gate spacers that define opposing sidewalls of a first trench on a substrate;
a first gate insulating film comprising a high-k dielectric layer conformally extending along the opposing sidewalls of the first trench and on a surface therebetween, wherein portions of the first gate spacers opposite the substrate are free of the first gate insulating film;
a first lower conductive film extending on the first gate insulating film along the opposing sidewalls of the first trench to define a first recess therein, wherein the portions of the first gate spacers opposite the substrate are free of the first lower conductive film, and the first lower conductive film does not contact the first gate spacers;
a work function adjustment film comprising a conductive layer configured to affect a threshold voltage of the semiconductor device extending along the sidewalls of the first trench and between the first gate insulating film and the first lower conductive film, wherein the portions of the first gate spacers opposite the substrate are further free of the work function adjustment film, and at least one of the first gate insulating film and the first lower conductive film extends along the first gate spacers away from the substrate and beyond the work function adjustment film; and
a first upper conductive film in the first recess defined by the first lower conductive film, wherein the semiconductor device further comprises:

a second transistor gate structure on the substrate alongside the first transistor gate structure and separated therefrom by an interlayer insulating film having an etch selectivity to the first gate spacers, the second transistor gate structure comprising:
second gate spacers that define opposing sidewalls of a second trench on the substrate;
a second gate insulating film conformally extending along the opposing sidewalls of the second trench and on a surface therebetween, wherein portions of the second gate spacers opposite the substrate are free of the second gate insulating film;
a second lower conductive film extending on the second gate insulating film along the opposing sidewalls of the second trench to define a second recess therein, wherein the portions of the second gate spacers opposite the substrate are free of the second lower conductive film; and
a second upper conductive film in the second recess defined by the second lower conductive film,
wherein a width of the second trench of the second transistor gate structure is different from that of the first trench of the first transistor gate structure.

11. The semiconductor device of claim 10 , wherein the first upper conductive film comprises one or more conductive layers, and wherein at least one of the one or more conductive layers of the first upper conductive film extends outside the first recess.

12. The semiconductor devic

Assignees

• Jeong Ji Min
• Kwon Kee Sang
• Lee Jin Wook
• Ko Ki Hyung
• Park Sang Jine
• Baek Jae Jik
• Yoon Bo Un
• Yun Ji Won
• Samsung Electronics Co Ltd

Inventors

• Jeong Ji-Min
• Kwon Kee-Sang
• Lee Jin-Wook
• Ko Ki-Hyung
• Park Sang-Jine
• Baek Jae-Jik
• Yoon Bo-Un
• Yun Ji-Won

Classifications

• H01L27/088

  Electricity · mapped topic

• H01L21/82345

  Electricity · mapped topic

• H01L29/42376

  Electricity · mapped topic

• H01L29/6656

  Electricity · mapped topic

• H01L27/0886 Primary

  Electricity · mapped topic