Semiconductor device

Patent metadata

Field	Value
Publication number	US-10121866-B2
Application number	US-201715421371-A
Country	US
Kind code	B2
Filing date	Jan 31, 2017
Priority date	Feb 16, 2016
Publication date	Nov 6, 2018
Grant date	Nov 6, 2018

Abstract

Provided is a semiconductor device having an RC-IGBT structure, the semiconductor device comprising an FWD (Free Wheel Diode) region and an IGBT (Insulated Gate Bipolar Transistor) region. Provided is a semiconductor device comprising:
a semiconductor substrate; a transistor section formed on the semiconductor substrate; a diode section formed on the semiconductor substrate and including a lifetime killer at a front surface side of the semiconductor substrate;
a gate runner provided between the transistor section and the diode section and electrically connected to a gate of the transistor section.

First claim

What is claimed is:

1. A semiconductor device comprising:
a semiconductor substrate;
a transistor section formed on the semiconductor substrate;
a diode section formed on the semiconductor substrate and including a lifetime killer at a front surface side of the semiconductor substrate; and
a gate runner provided between the transistor section and the diode section and electrically connected to a gate of the transistor section,
a well region having a conductivity type different from that of the semiconductor substrate and formed below the gate runner such that the well region overlaps the transistor section, the transistor section thereby having an overlapping region and a non-overlapping region,
wherein the semiconductor substrate includes the lifetime killer in a substantially entire region below the gate runner at the front surface side of the semiconductor substrate.

2. The semiconductor device according to claim 1 , wherein the semiconductor substrate includes the lifetime killer in an entire region at the front surface side of the semiconductor substrate and below the gate runner.

3. The semiconductor device according to claim 1 , wherein the semiconductor substrate includes the lifetime killer in at least a portion at the front surface side of the semiconductor substrate and closer to the transistor section than to the gate runner.

4. The semiconductor device according to claim 1 , wherein a collector region of the transistor section is formed in at least a portion below the gate runner.

5. The semiconductor device according to claim 1 , wherein a collector region of the transistor section is formed in an entire region below the gate runner.

6. The semiconductor device according to claim 1 , wherein a collector region of the transistor section is formed at least a portion closer to the diode section than to the gate runner.

7. The semiconductor device according to claim 1 , wherein a cathode region of the diode section is not formed below the gate runner.

8. The semiconductor device according to claim 1 , wherein
the transistor section includes a gate trench section formed on the front surface of the semiconductor substrate, and
at least a portion of the gate trench section is formed below the gate runner.

9. The semiconductor device according to claim 1 , wherein the diode section is arranged at an end portion of an active region of the semiconductor device.

10. The semiconductor device according to claim 1 , wherein the diode section is arranged at a corner portion of an active region of the semiconductor device.

11. The semiconductor device according to claim 1 , wherein the diode section surrounds the transistor section in a planar view.

12. The semiconductor device according to claim 1 , wherein the transistor section surrounds the diode section in a planar view.

13. The semiconductor device according to claim 1 further comprising:
a temperature sensor provided adjacent to the transistor section to detect signals in response to a temperature of the transistor section; and
a temperature sensor terminal electrically connected to the temperature sensor through a wiring for sensors, to which the signals detected by the temperature sensor are input.

14. The semiconductor device according to claim 13 , wherein the diode section includes an isolation region to allow at least one of the gate runner and the wiring for sensors to traverse the diode section.

15. The semiconductor device according to claim 13 , wherein the temperature sensor is arranged above a well region.

16. The semiconductor device according to claim 13 , wherein the temperature sensor is surrounded by the transistor section.

17. The semiconductor device according to claim 13 , wherein the diode section includes:
a first diode region formed at one end of an active region of the semiconductor device; and
a second diode region formed at the other end of the active region opposing to the one end.

18. The semiconductor device according to claim 17 , wherein the temperature sensor is provided between the first diode region and the second diode region.

19. The semiconductor device according to claim 1 further comprising:
an emitter region of a first conductivity type formed on the front surface of the semiconductor substrate;
a base region of a second conductivity type which is different from the first conductivity type formed on the front surface of the semiconductor substrate;

an accumulating layer of the first conductivity type formed at the front surface side of the semiconductor substrate and having a higher concentration than an impurity concentration of the semiconductor substrate; and
an interlayer insulating film formed on the front surface of the semiconductor substrate;

wherein the interlayer insulating film includes a contact hole corresponding to at least some regions of the emitter region and the base region and formed to penetrate the interlayer insulating film, and
the accumulating layer is formed inside a region in which the contact hole is formed in an extending direction of a trench section included in the transistor section.

20. The semiconductor device according to claim 19 , wherein the accumulating layer is formed inside a region in which the contact hole is formed in an extending direction of a trench section included in the diode section.

21. The semiconductor device according to claim 19 , wherein the accumulating layer is formed in a region in which the transistor section, the diode section and the gate runner are formed.

22. The semiconductor device according to claim 19 , wherein at least a portion of the accumulating layer is formed within a well region.

23. The semiconductor device according to claim 19 , wherein the contact hole at the diode section side is formed to be apart from a well region in a planar view.

24. The semiconductor device according to claim 1 , wherein at least a portion of an end portion of a trench section of the transistor section is formed within a well region.

25. The semiconductor device according to claim 1 , wherein the semiconductor substrate does not include a lifetime killer in substantially the entire non-overlapping region of the transistor section at the front surface side of the semiconductor substrate.

26. The semiconductor device according to claim 1 , wherein the diode section is a free wheel diode section.

27. The semiconductor device according to claim 1 , further comprising
an anode region formed at the front surface side of the semiconductor substrate; and
a cathode region formed at the back surface side of the semiconductor substrate.

Assignees

• Fuji Electric Co Ltd

Inventors

• Naito Tatsuya

Classifications

• H10P32/171

  being group IV material · CPC title

• H10P32/18

  Diffusion lifetime killers · CPC title

• H10W72/926

  Multiple bond pads having different sizes · CPC title

• H01L21/221

  Electricity · mapped topic

• H01L29/7395

  Electricity · mapped topic