Variable impedance match and variable harmonic terminations for different modes and frequency bands

US10116272B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10116272-B2
Application numberUS-201715422282-A
CountryUS
Kind codeB2
Filing dateFeb 1, 2017
Priority dateMar 12, 2013
Publication dateOct 30, 2018
Grant dateOct 30, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An amplifier with switchable and tunable harmonic terminations and a variable impedance matching network is presented. The amplifier can adapt to different modes and different frequency bands of operation by appropriate switching and/or tuning of the harmonic terminations and/or the variable impedance matching network.

First claim

Opening claim text (preview).

The invention claimed is: 1. An arrangement configured to receive and amplify a first signal, the arrangement comprising: an amplifier having an amplifier output terminal, wherein, during operation of the arrangement, the amplifier generates a second signal by amplifying the first signal; a first harmonic termination arrangement comprising a first set of one or more harmonic terminations operatively connected in series; a second harmonic termination arrangement comprising a second set of one or more harmonic terminations operatively connected in series; and a switching arrangement; wherein: the switching arrangement is configured to selectively provide a conduction path of the second signal through one of the first set and the second set of one or more harmonic terminations operatively connected in series; and each of the first set and the second set of one or more harmonic terminations is configured to resonate at a corresponding harmonic resonant frequency. 2. An arrangement configured to receive and amplify a first signal, the arrangement comprising: an amplifier having an amplifier output terminal, wherein, during operation of the arrangement, the amplifier generates a second signal by amplifying the first signal; one or more harmonic shorts operatively connected between the amplifier output terminal and a reference voltage, one or more switches operatively connected to one or more harmonic shorts, a first harmonic termination arrangement comprising a first set of one or more harmonic terminations operatively connected in series; a second harmonic termination arrangement comprising a second set of one or more harmonic terminations operatively connected in series; and a switching arrangement; wherein: the one or more switches are configured to selectively decouple the amplifier output terminal from one or more harmonic shorts, each of the one or more harmonic shorts is configured to resonate at a corresponding harmonic resonant frequency; the switching arrangement is configured to selectively provide a conduction path of the second signal through one of the first set and the second set of harmonic terminations operatively connected in series; and each of the first set and the second set of one or more harmonic terminations configured to resonate at a corresponding harmonic resonant frequency. 3. The arrangement according to claim 1 or 2 , wherein the one or more switches have an ON or OFF state, and the switching arrangement has a first or second state, the ON or OFF state and the first or second state being in correspondence of one of: a) a modulation scheme of the first signal, b) a frequency of operation of the first signal, and c) a desired class of operation of the amplifier. 4. The arrangement according to claim 3 , further comprising an impedance matching network coupled to at least one switch of the one or more switches. 5. The arrangement according to claim 4 , wherein the amplifier is selected from the group consisting of: a) a stacked arrangement of power amplifiers (PA), and b) a scalable periphery amplifier. 6. The arrangement according to claim 4 , wherein one or more switches of the one or more switches are constructed using stacked FETs and the switching arrangement comprises stacked FETs. 7. The arrangement according to claim 3 , wherein the amplifier is selected from the group consisting of: a) a stacked arrangement of power amplifiers (PA), and b) a scalable periphery amplifier. 8. The arrangement according to claim 3 , wherein one or more switches of the one or more switches are constructed using stacked FETs and the switching arrangement comprises stacked FETs. 9. The arrangement according to claim 1 or 2 , further comprising a variable impedance matching network operatively coupled to an output of the arrangement and configured to match an impedance at the output terminal of the amplifier to a load impedance coupled to the output of the variable impedance matching network. 10. The arrangement according to claim 9 , wherein the one or more switches have an ON or OFF state, and the switching arrangement has a first or second state, the ON or OFF state and the first or second state being in correspondence of one of: a) a modulation scheme of the first signal, b) a frequency of operation of the first signal, and c) a desired class of operation of the amplifier. 11. The arrangement according to claim 10 , wherein the amplifier is selected from the group consisting of: a) a stacked arrangement of power amplifiers (PA), and b) a scalable periphery amplifier. 12. The arrangement according to claim 10 , wherein one or more switches of the one or more switches are constructed using stacked FETs and the switching arrangement comprises stacked FETs. 13. The arrangement of claim 1 , wherein the first and the second harmonic terminations are variable harmonic terminations. 14. The arrangement of claim 1 , wherein the switching arrangement comprises two switches. 15. The arrangement of claim 2 , wherein the first and the second one or more harmonic terminations comprise one or more capacitive elements and one or more inductive elements. 16. A signal-shaping method comprising: an amplifier having an operating parameter; configuring the amplifier to receive and input signal at an input terminal and to amplify the signal and output a corresponding amplified signal at an output terminal of the amplifier; providing a first harmonic termination arrangement comprising a first set of one or more harmonic terminations connected in series; providing a second harmonic termination arrangement comprising a second set of one or more harmonic terminations connected in series; as a function of the operating parameter, configuring the switching arrangement to selectively provide a conduction path of the input signal through one of the first and the second harmonic termination arrangement; and adjusting one or more harmonics of the output signal, thereby shaping the output signal. 17. The signal-shaping method of claim 16 , wherein the first and the second one or more harmonic terminations comprise one or more capacitive elements and one or more inductive elements. 18. The signal-shaping method of claim 17 , wherein the operating parameter is selected from one of: a) a modulation scheme of the input signal, b) an operating frequency of the input signal and c) a desired class of operation of the amplifier.

Assignees

Inventors

Classifications

  • Automatic matching of load impedance to source impedance · CPC title

  • H03F1/565Primary

    using inductive elements · CPC title

  • using FET's · CPC title

  • comprising distributed impedance elements together with lumped impedance elements · CPC title

  • in field-effect transistor amplifiers · CPC title

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Frequently asked questions

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What does patent US10116272B2 cover?
An amplifier with switchable and tunable harmonic terminations and a variable impedance matching network is presented. The amplifier can adapt to different modes and different frequency bands of operation by appropriate switching and/or tuning of the harmonic terminations and/or the variable impedance matching network.
Who is the assignee on this patent?
Psemi Corp
What technology area does this patent fall under?
Primary CPC classification H03F1/565. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 30 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).