Method for direct adhesion via low-roughness metal layers

Patent metadata

Field	Value
Publication number	US-10115698-B2
Application number	US-201515519203-A
Country	US
Kind code	B2
Filing date	Oct 14, 2015
Priority date	Oct 17, 2014
Publication date	Oct 30, 2018
Grant date	Oct 30, 2018

Abstract

A method for assembling a first substrate and a second substrate via metal adhesion layers, the method including: depositing, on a surface of each of the first and second substrates, a metal layer with a thickness controlled to limit surface roughness of each of the deposited metal layers to below a roughness threshold; exposing the metal layers deposited on the surface of the first and second substrates to air; directly adhering the first and second substrates by placing the deposited metal adhesion layers in contact, the surface roughness of the contacted layers being that obtained at an end of the depositing. The adhesion can be carried out in the air, at atmospheric pressure and at room temperature, without applying pressure to the assembly of the first and second substrates resulting from directly contacting the deposited metal adhesion layers.

First claim

The invention claimed is:

1. A method for assembling a first substrate and a second substrate via metal bonding layers, comprising: depositing, onto a surface of each of the first and second substrates, a metal layer having a thickness which is controlled to limit surface roughness of the metal layer below a roughness threshold; exposing the metal layers to air; contacting the metal layers after the metal layers have been exposed to air, the surface roughness of the contacted metal layers being that obtained at an end of the depositing, and directly bonding the first and second substrates through the contacted metal layers; wherein the bonding is made without applying physical pressure to the assembly of the first and second substrates resulting from contacting the metal bonding layers.

2. The method according to claim 1 , wherein the contacting is implemented after a maximum time of exposition of the metal layers to the air less than 30 minutes.

3. The method according to claim 1 , wherein the bonding is made at a temperature less than 50° C.

4. The method according to claim 1 , wherein the bonding is made at atmospheric pressure.

5. The method according to claim 1 , wherein the bonding is made in air.

6. The method according to claim 1 , further comprising, before the depositing the metal layer onto the surface of the first substrate, forming a superficial layer on the first substrate.

7. The method according to claim 6 , wherein the superficial layer is a barrier layer to diffusion of material of the metal layer into the first substrate.

8. The method according to claim 6 , wherein the superficial layer is a layer of a material chosen from dielectrics, nitrides, or metals with surface roughness that does not enable the first and second substrates to be directly bonded.

9. The method according to claim 1 , wherein the first and second substrates have different thermal expansion coefficients.

10. The method according to claim 1 , wherein the metal layers are deposited by physical vapor deposition.

11. The method according to claim 1 , wherein the metal layers are copper layers having a thickness which is controlled to limit their surface roughness, as measured with an atomic force microscope scanning an area of 1*1 μm 2 , below a roughness threshold of 1.0 nm RMS.

12. The method according to claim 1 , wherein the metal layers are gold layers having a thickness which is controlled to limit their surface roughness, as measured with an atomic force microscope scanning an area of 1*1 μm 2 , below a roughness threshold of 1.2 nm RMS.

13. The method according to claim 1 , further comprising, prior to the bonding, forming, by implanting atomic species, an embrittling zone within the first substrate and, following the bonding, removing a portion of the first substrate by separating the first substrate at the embrittling zone.

Assignees

• Commissariat Energie Atomique

Inventors

• Gondcharton Paul
• Benaissa Lamine
• Imbert Bruno

Classifications

• H10W90/736

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W90/734

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/732

  between stacked chips · CPC title

• H10W72/07341

  Controlling the bonding environment, e.g. atmosphere composition or temperature · CPC title

• H10W72/07331

  Connecting techniques · CPC title