Substrate inspection apparatus

Patent metadata

Field	Value
Publication number	US-10114070-B2
Application number	US-201414487480-A
Country	US
Kind code	B2
Filing date	Sep 16, 2014
Priority date	Sep 17, 2013
Publication date	Oct 30, 2018
Grant date	Oct 30, 2018

Abstract

A substrate inspection apparatus can efficiently inspect electric characteristics of the semiconductor device. A prober 10 includes a probe card 15 having a multiple number of probe needles 17 to be brought into contact with electrodes of a semiconductor device formed on a wafer W; and a test box 14 electrically connected to the probe card 15 . A card-side inspection circuit of the probe card 15 reproduces a circuit configuration on which the semiconductor device is to be mounted after separated from the wafer W, e.g., the circuit configuration of a function extension card, and a box-side inspection circuit 21 of the test box 14 reproduces a circuit configuration on which the semiconductor device is to be mounted, e.g., a part of the circuit configuration of the mother board.

First claim

We claim:

1. An inspection apparatus for inspecting a semiconductor device formed on a substrate, comprising:
a probe card comprising a card-side inspection circuit and a plurality of probes to be brought into contact with electrodes of the semiconductor device;
a test box electrically connected to the probe card, the test box comprising a box-side inspection circuit; and
a loader configured to load the substrate,
wherein the card-side inspection circuit has a circuit configuration of a function extension card to which the semiconductor device is to be mounted after being separated from the substrate,
wherein the box-side inspection circuit has a circuit configuration of a motherboard to which the function extension card is connected,
wherein the probe card is located closer to the semiconductor device than the test box,
wherein the loader includes a basic unit which includes at least one of a power supply, a controller and a measurement module, said basic unit forming a common part between various circuit configurations on which the semiconductor device is to be mounted,
wherein the box-side inspection circuit and the basic unit form the circuit configurations on which the semiconductor device is to be mounted,
wherein the power supply of the basic unit is configured to supply a power to the box-side inspection circuit and to the card-side inspection circuit via the box-side inspection circuit, and the controller of the basic unit is configured to control the box-side inspection circuit to inspect electric characteristics of the semiconductor device, and
wherein the semiconductor device is a MPU (Main Processing Unit), an APU (Accelerated Processing Unit), a GPU (Graphics Processing unit), or a RF tuner.

2. The substrate inspection apparatus of claim 1 ,
wherein the probe card and the test box are electrically connected to each other via a flexible wiring.

3. The substrate inspection apparatus of claim 1 ,
wherein the test box includes a frame to which a board having the box-side inspection circuit is fastened.

Assignees

• Tokyo Electron Ltd

Inventors

• Murata Michio
• Morita Shingo
• Narikawa Kenichi

Classifications

• G01R31/2896

  Testing of IC packages; Test features related to IC packages (containers per se H10W76/10, encapsulations per se H10W74/00) · CPC title

• G01R31/2846

  using hard- or software simulation or using knowledge-based systems, e.g. expert systems, artificial intelligence or interactive algorithms · CPC title

• G01R31/2889 Primary

  Interfaces, e.g. between probe and tester (G01R31/31905 and G01R1/07364 take precedence) · CPC title

• H10P74/00

  Testing or measuring during manufacture or treatment of wafers, substrates or devices · CPC title

• H10P74/27

  Structural arrangements therefor · CPC title