Implementing reworkable strain relief packaging structure for electronic component interconnects

US10111322B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10111322-B2
Application numberUS-201615373511-A
CountryUS
Kind codeB2
Filing dateDec 9, 2016
Priority dateDec 9, 2016
Publication dateOct 23, 2018
Grant dateOct 23, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method and structure are provided for implementing enhanced reworkable strain relief packaging for electronic component interconnects. A plurality of custom strain relief pads is provided with a component footprint wiring layout on a component carrier or a component. The custom strain relief pads are disposed at component body perimeter locations. A solder mask is applied around these pad locations to provide a constrained area for a fusible surface coating. A fusible surface coating material is applied in the to the custom strain relief pads in the constrained area and then soldering of components is performed. Then a structural adhesive material is applied to the custom strain relief pad locations.

First claim

Opening claim text (preview).

What is claimed is: 1. A structure for implementing enhanced reworkable strain relief packaging for electronic component interconnects comprising: a component carrier; a plurality of custom strain relief pads provided with a component footprint wiring layout on the component carrier, said custom strain relief pads disposed at component body perimeter locations; a solder mask applied around said pad locations, said solder mask providing a constrained area for a fusible surface coating; said fusible surface coating covering said custom strain relief pads in the constrained area; a component soldered to said component carrier; and a structural adhesive material carried by said fusible surface coating at custom strain relief pad locations, residing partially outside a component body perimeter and partially underneath a component body to accommodate optimized fillet formation of strain relief structural adhesive material to the custom coated strain relief pad surfaces, to a bottom surface face of the component body perimeter, and to vertical sidewalls of the component body perimeter. 2. The structure as recited in claim 1 wherein said fusible surface coating material is formed of a selected material having a melting temperature at or below a melting temperature of said component solder. 3. The structure as recited in claim 1 wherein said structural adhesive material provides a rigid structural adhesive. 4. The structure as recited in claim 3 wherein said rigid structural adhesive ruggerdizes and provides strain relief for said component. 5. The structure as recited in claim 1 wherein said structural adhesive material is cured using a selected one of a heat cure and an ultraviolet (UV) cure. 6. The structure as recited in claim 1 wherein said component soldered to said component carrier uses a selected one of a reflow solder method and a surface-mount technology (SMT) assembly method. 7. The structure as recited in claim 1 wherein said structural adhesive material carried by said fusible surface coating is removed with said component by a local heating.

Assignees

Inventors

Classifications

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • Soldering or alloying · CPC title

  • Connecting techniques · CPC title

  • Thermally treating (reflowing H10W72/01357) · CPC title

  • of die-attach connectors · CPC title

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Frequently asked questions

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What does patent US10111322B2 cover?
A method and structure are provided for implementing enhanced reworkable strain relief packaging for electronic component interconnects. A plurality of custom strain relief pads is provided with a component footprint wiring layout on a component carrier or a component. The custom strain relief pads are disposed at component body perimeter locations. A solder mask is applied around these pad loc…
Who is the assignee on this patent?
IBM
What technology area does this patent fall under?
Primary CPC classification H10W42/121. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 23 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).