Enhanced parallel protection circuit

US10110025B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10110025-B2
Application numberUS-201615007171-A
CountryUS
Kind codeB2
Filing dateJan 26, 2016
Priority dateJan 26, 2016
Publication dateOct 23, 2018
Grant dateOct 23, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An enhanced parallel protection circuit is provided. A system using separate battery packs in a parallel configuration is arranged with multiple protection circuit modules (PCMs). The PCMs are configured to detect fault conditions, such as over voltage, under voltage, excess current, excess heat, etc. Individual PCMs can be configured to control associated switches and/or other components. When a fault condition is detected by an individual PCM, the individual PCM triggers one or more associated switches to shut down one or more components. In addition, by the use of the techniques disclosed herein, the individual PCM can also trigger switches that are controlled by other PCMs. Configurations disclosed herein mitigate occurrences where a multi-PCM device is operating after at least one PCM has shut down. Configurations disclosed herein provide safeguards and redundant protection in scenarios where a fault event is detected by one PCM and not detected by another PCM in a parallel configuration.

First claim

Opening claim text (preview).

What is claimed is: 1. An apparatus, comprising: a first protection circuit module comprising one or more inputs and an output coupled to a first node, wherein the first protection circuit module is configured to activate the output coupled to the first node and transition to a fault state when a value of a signal at the one or more inputs of the first protection circuit module meets or exceeds one or more thresholds; a second protection circuit module comprising one or more inputs and an output coupled to a second node, wherein the second protection circuit module is configured to activate the output coupled to the second node and transition to the fault state when a value of a signal at the one or more inputs of the second protection circuit module meets or exceeds one or more thresholds; a first switch comprising an input coupled to the first node, wherein the first switch creates a low impedance path for a first path when the first switch is on, and wherein the first switch creates a high impedance path or an open circuit for the first path when the first switch is off; and a second switch comprising an input coupled to the second node, wherein the second switch creates a low impedance path for a second path when the second switch is on, and wherein the second switch creates a high impedance path or an open circuit for the second path when the second switch is off, wherein the first node and the second node are coupled by one or more components to cause the first switch and the second switch to be off when either the output of the first protection circuit or the output of the second protection circuit are activated, wherein the one or more components coupling the first node and the second node comprise a first diode, a first resistor, a second diode, and a second resistor, wherein a cathode of the first diode is coupled to the first node and an anode of the first diode is coupled to the input of the first switch, wherein the first resistor is arranged in parallel with the first diode, wherein a cathode of the second diode is coupled to the second node and an anode of the second diode is coupled to the input of the second switch, wherein the second resistor is arranged in parallel with the second diode, and wherein the input of the first switch and the input of the second switch are coupled by a conductor. 2. The apparatus of claim 1 , wherein the first switch is caused to be on when the first protection circuit module and the second protection circuit module are both in an operating state, and wherein the second switch is caused to be on when the first protection circuit module and the second protection circuit module are both in an operating state. 3. The apparatus of claim 1 , wherein the one or more components are configured to enable the first protection circuit module to turn the first switch and the second switch off without conflicting with a signal of the output of the second protection circuit module. 4. The apparatus of claim 1 , wherein the one or more components are configured to enable the second protection circuit module to turn the first switch and the second switch off without conflicting with a signal of the output of the first protection circuit module. 5. The apparatus of claim 1 , wherein the first switch comprises a transistor, wherein the input of the first switch is a gate of the transistor and the first path passes through a source of the transistor and a drain of the transistor. 6. The apparatus of claim 5 , wherein the transistor is a field-effect transistor or a metal oxide semiconductor field-effect transistor. 7. The apparatus of claim 1 , wherein the second switch comprises a transistor, wherein the input of the second switch is a gate of the transistor and the second path passes through a source of the transistor and a drain of the transistor. 8. The apparatus of claim 7 , wherein the transistor is a field-effect transistor or a metal oxide semiconductor field-effect transistor. 9. The apparatus of claim 1 , wherein the one or more inputs of the first protection circuit module comprise a first input coupled to a cathode of a first battery and a second input coupled to an anode of the first battery, and wherein the one or more inputs of the second protection circuit module comprise a first input coupled to a cathode of a second battery and a second input coupled to an anode of the second battery, wherein the first path couples the anode of the first battery to a ground node, and wherein the second path couples the anode of the second battery to the ground node. 10. The apparatus of claim 1 , wherein the one or more inputs of the first protection circuit module comprise a first input coupled to a cathode of a first battery and a second input coupled to an anode of the first battery, and wherein the one or more inputs of the second protection circuit module comprise a first input coupled to a cathode of a second battery and a second input coupled to an anode of the second battery, wherein the first path couples the cathode of the first battery to a power source node, and wherein the second path couples the cathode of the second battery and the power source node. 11. An apparatus, comprising: a first protection circuit module comprising one or more inputs, an output coupled to a first node, an output coupled to a second node, wherein the first protection circuit module is configured to activate the output coupled to the first node and transition to a first fault state when one or more values of at least one signal at the one or more inputs of the first protection circuit module meets a first set of criteria, and wherein the first protection circuit module is configured to activate the output coupled to the second node and to transition to a second fault state when the one or more values of the at least one signal at the one or more inputs of the first protection circuit module meets a second set of criteria; a second protection circuit module comprising one or more inputs, an output coupled to a third node, an output coupled to a fourth node, wherein the second protection circuit module is configured to activate the output coupled to the third node and to transition to a first fault state when one or more values of at least one signal at the one or more inputs of the second protection circuit module meets the first set of criteria, and wherein the second protection circuit module is configured to activate the output coupled to the fourth node and to transition to the second fault state when the one or more values of the at least one signal at the one or more inputs of the second protection circuit module meets the second set of criteria; a first switch comprising an input coupled to the first node, wherein the first switch creates a low impedance path for a first path when the first switch is on, and wherein the first switch creates a high impedance path or an open circuit for the first path when the first switch is off; a second switch comprising an input coupled to the second node, wherein the second switch creates a low impedance path for a second path when the second switch is on, and wherein the second switch creates a high impedance path or an open circuit for the second path when the second switch is off; a third switch comprising an input coupled to the third node, wherein the third switch creates a low impedance path for a third path when the third switch is on, and wherein the third switch creates a high impedance path or an open circuit for the third path when the third switch is off, wherein the second node and the third node are coupled by one or more components to cause the second switch and the third switch to be off when either the output coupled to the second node

Assignees

Inventors

Classifications

  • using battery or load disconnect circuits (H02J9/002 takes precedence) · CPC title

  • H02J7/0026Primary

    Electricity · mapped topic

  • Electricity · mapped topic

  • H01M10/425Primary

    Structural combination with electronic components, e.g. electronic circuits integrated to the outside of the casing (printed circuits H05K1/00) · CPC title

  • with means for increasing reliability, e.g. redundancy arrangements {(for logic circuits H03K19/003)} · CPC title

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What does patent US10110025B2 cover?
An enhanced parallel protection circuit is provided. A system using separate battery packs in a parallel configuration is arranged with multiple protection circuit modules (PCMs). The PCMs are configured to detect fault conditions, such as over voltage, under voltage, excess current, excess heat, etc. Individual PCMs can be configured to control associated switches and/or other components. When…
Who is the assignee on this patent?
Microsoft Technology Licensing Llc
What technology area does this patent fall under?
Primary CPC classification H02J7/0026. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 23 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 6 related publications on this page (citations in our corpus or others sharing the same primary CPC).