Double-sided package module and substrate strip

Patent metadata

Field	Value
Publication number	US-10109595-B2
Application number	US-201615267233-A
Country	US
Kind code	B2
Filing date	Sep 16, 2016
Priority date	Feb 3, 2016
Publication date	Oct 23, 2018
Grant date	Oct 23, 2018

Abstract

A double-sided package module includes a substrate, a first sealing member, a second sealing member, and an extension portion. The substrate includes electronic components positioned on a first surface and a second surface of the substrate. The first sealing member and the second sealing member are positioned on the first surface and the second surface, respectively. The extension portion protrudes from a lateral surface of the substrate into a space between the first sealing member and the second sealing member.

First claim

What is claimed is:

1. A double-sided package module, comprising:
a substrate comprising electronic components positioned on a first surface and a second surface of the substrate;
a first sealing member and a second sealing member positioned on the first surface and the second surface, respectively;
an extension portion protruding from a lateral surface of the substrate into a space between the first sealing member and the second sealing member so as to be positioned between the first sealing member and the second sealing member;
a first shielding layer disposed on an upper surface and a lateral surface of the first sealing member; and
a second shielding layer positioned on a lateral surface of the second sealing member,
wherein the extension portion comprises a conductive member connected to the fist shielding layer on the first sealing member and the second shielding layer on the second sealing member.

2. The double-sided package module of claim 1 , wherein the extension portion comprises a first curved surface connected to a lateral surface of the first sealing member.

3. The double-sided package module of claim 1 , wherein the extension portion comprises a second curved surface connected to a lateral surface of the second sealing member.

4. The double-sided package module of claim 1 , wherein the conductive member is continuously formed along a circumference of the substrate.

5. The double-sided package module of claim 1 , wherein the conductive member is continuously formed in a thickness direction of the substrate.

6. The double-sided package module of claim 1 , wherein the conductive member is formed of linear lines or oblique lines extended from an end of the extension portion toward the substrate.

7. The double-sided package module of claim 1 , further comprising:
a via electrode extended from the substrate to a lower surface of the second sealing member.

8. The double-sided package module of claim 1 , wherein the extension portion comprises a linear segment extending between two curved surfaces.

9. A substrate strip, comprising:
a substrate;
a conductive member positioned on and through the substrate and configured to divide the substrate into unit regions; and
electronic components positioned in a space divided by the conductive member;
a first sealing member and a second sealing member positioned on a first surface and a second surface of the substrate, respectively;
a first shielding layer disposed on an upper surface and a lateral surface of the first sealing member; and
a second shielding layer positioned on a lateral surface of the second sealing member,
wherein the conductive member is in electrical contact with the fist shielding layer and the second shielding layer.

10. The substrate strip of claim 9 , wherein the first pattern comprises a quadrangular shape.

11. The substrate strip of claim 10 , wherein the second pattern comprises a linear shape.

12. The substrate strip of claim 9 , wherein the conductive member comprises a first pattern and a second pattern extending orthogonal to the first pattern.

13. A double-sided package module, comprising:
a substrate comprising
an upper surface and a lower surface, wherein electronic components are positioned on at least one of the upper surface and the lower surface,
printed circuits positioned within or on the surface of the substrate and configured to connect the electronic components,
an extension portion, formed between the upper and the lower surfaces, comprising a first curved surface formed on a side of the upper surface and a second curved surface formed on a side of the lower surface, and
a conductive member continuously formed along a circumference of the extension portion.

14. The double-sided package module of claim 13 , further comprising:
a first sealing member formed on the upper surface of the substrate; and
a second sealing member formed on the lower surface of the substrate.

15. The double-sided package module of claim 14 , wherein the first and the second sealing members cover external surfaces of the electronic components.

16. The double-sided package module of claim 14 , further comprising:
a first shielding layer formed on an upper surface and a lateral surface of the first sealing member; and
a second shielding layer formed on a lateral surface of the second sealing member.

17. The double-sided package module of claim 16 , wherein the extension portion protrudes from a lateral surface of the substrate to connect to the first and the second shielding layers and connects to lateral surfaces of the first and the second sealing members.

18. The double-sided package module of claim 13 , wherein the conductive member comprises a first pattern having a quadrangular shape surrounding the electronic components in unit regions, and a second pattern having a linear shape extended from the first pattern in a single direction.

19. The double-sided package module of claim 13 , wherein the conductive member is exposed to an external surface of the substrate, and has a form in which oblique lines are repeated in a symmetrical manner.

Assignees

• Samsung Electro Mech

Inventors

• Yoo Do Jae
• Jung Hee Jung
• Ryu Jong In
• Sim Ki Joo

Classifications

• H10W42/276

  the arrangements being on an external surface of the package, e.g. on the outer surface of an encapsulation · CPC title

• H10W90/701

  characterised by the relative positions of pads or connectors relative to package parts · CPC title

• H10W90/22

  the stacked chips being on both top and bottom sides of a package substrate, interposer or RDL · CPC title

• H10W72/823

  Interconnections through encapsulations, e.g. pillars through molded resin on a lateral side a chip · CPC title

• H10W90/00

  Package configurations · CPC title