Data storage and variable length error correction information
US-9323609-B2 · Apr 26, 2016 · US
US10108470B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10108470-B2 |
| Application number | US-201514981386-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 28, 2015 |
| Priority date | Dec 28, 2015 |
| Publication date | Oct 23, 2018 |
| Grant date | Oct 23, 2018 |
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Apparatuses, systems, methods, and computer program products are disclosed for parity storage management. A system includes a plurality of storage elements. A system includes a controller that selects a parity storage element from a plurality of storage elements. A parity storage element has an error rate higher than other elements of a plurality of storage elements, and the parity storage element stores parity data for the plurality of storage elements.
Opening claim text (preview).
What is claimed is: 1. A method comprising: determining, at a non-volatile storage device, that a storage element of a plurality of storage elements has an error rate higher than other storage elements of the plurality of storage elements; determining that the storage element has a highest likelihood of being affected by read disturb among the plurality of storage elements based on the determined error rate; selecting the storage element as a parity storage element to reduce the read disturb affecting the storage element by lowering a read frequency of the storage element; and storing parity data for the plurality of storage elements in the parity storage element. 2. The method of claim 1 , wherein determining that the storage element of the plurality of storage elements has the error rate higher than the other elements of the plurality of storage elements comprises: comparing test data for each storage element of the plurality of storage elements, wherein the test data comprises the error rate; and selecting the storage element with a highest error rate. 3. The method of claim 2 , wherein comparing the test data for each storage element of the plurality of storage elements comprises comparing manufacturing test data for each storage element of the plurality of storage elements, the manufacturing test data being stored with the plurality of storage elements. 4. The method of claim 1 , wherein determining that the storage element of the plurality of storage elements has the error rate higher than the other elements of the plurality of storage elements comprises: comparing age parameters of each storage element of the plurality of storage elements; and selecting the storage element with a highest age parameter. 5. The method of claim 1 , wherein determining that the storage element of the plurality of storage elements has the error rate higher than the other elements of the plurality of storage elements comprises: comparing an operational error rate of each storage element of the plurality of storage elements; and selecting the storage element with a highest operational error rate. 6. The method of claim 1 , wherein the storage element comprises one or more of a wordline, a block, a chip, a die, and a die plane. 7. The method of claim 1 , wherein the storage element comprises a logical block. 8. The method of claim 7 , wherein the logical block comprises a portion of a plurality of physical blocks. 9. The method of claim 1 , further comprising determining a read failure of one storage element of the plurality of storage elements. 10. The method of claim 9 , further comprising reading the parity data from the parity storage element in response to the read failure of the one storage element to recover data that was not readable due to the read failure. 11. The method of claim 1 , further comprising: determining that a second storage element of the plurality of storage elements has the error rate higher than the storage element; selecting the second storage element as a new parity storage element; and storing parity data for the plurality of storage elements in the new parity storage element. 12. The method of claim 11 , wherein determining that the second storage element of the plurality of storage elements has the error rate higher than the storage element comprises determining that the second storage element has the determined error rate after selecting the storage element as the parity storage element. 13. The method of claim 1 , further comprising: determining N storage elements of the plurality of storage elements having the error rate higher than M other storage elements of the plurality of storage elements, wherein the N storage elements comprises the storage element, and M and N are natural numbers; and rotating storing parity data for the plurality of storage elements between each storage element of the N storage elements for each write operation, program operation, or some combination thereof. 14. The method of claim 1 , further comprising determining, at a predetermined interval, whether an operational error rate of the storage element is higher than an operational error rate of each of the other storage elements of the plurality of storage elements. 15. The method of claim 14 , further comprising selecting a new parity storage element to store parity data in response to determining the operational error rate of the storage element is lower than the operational error rate of one or more of the other storage elements. 16. A system comprising: a plurality of storage elements; and a controller configured to: determine that a storage element of a plurality of storage elements has an error rate higher than other storage elements of the plurality of storage elements; determine that the storage element has a highest likelihood of being affected by read disturb among the plurality of storage elements based on the determined error rate; and select the storage element as a parity storage element to reduce the read disturb affecting the storage element by lowering a read frequency of the storage element and store parity data for the plurality of storage elements in the parity storage element. 17. The system of claim 16 , wherein the controller comprises hardware of a nonvolatile storage device comprising the plurality of storage elements. 18. The system of claim 16 , wherein the controller comprises a device driver for a non-volatile storage device comprising the plurality of storage elements, the device driver comprising a non-transitory computer readable storage medium storing executable code of the controller. 19. A computer program product comprising a non-transitory computer-readable storage medium storing computer usable program code, the computer usable program code executable to perform: determining that a memory element of a plurality of memory elements has a higher error rate than other memory elements of the plurality of memory elements; determining that the memory element has a highest likelihood of being affected by read disturb among the plurality of memory elements based on the determined error rate; selecting the memory element as a backup memory element to reduce the read disturb affecting the memory element by lowering a read frequency of the memory element; writing backup data to the backup memory element for the plurality of memory elements; and accessing the backup data in response to a read error on one of the plurality of memory elements. 20. An apparatus comprising: means for determining, at a non-volatile storage device, that a storage element of a plurality of storage elements has an error rate higher than other storage elements of the plurality of storage elements; means for determining that the storage element has a highest likelihood of being affected by read disturb among the plurality of storage elements based on the determined error rate; means for selecting the storage element as a parity storage element to reduce the read disturb affecting the storage element by lowering a read frequency of the storage element; and means for storing parity data for the plurality of storage elements in the parity storage element.
Checking stores for correct operation {; Subsequent repair}; Testing stores during standby or offline operation · CPC title
Accessing, addressing or allocating within memory systems or architectures (digital input from, or digital output to record carriers, e.g. to disk storage units, G06F3/06) · CPC title
in a storage system, e.g. in a DASD or network based storage system (drivers for digital recording or reproducing units G06F3/06; circuits for error detection or correction within digital recording or reproducing units G11B20/18; for distributed storage of data in networks, e.g. transport arrangements for network file system [NFS], storage area networks [SAN] or network attached storage [NAS], H04L67/1097) · CPC title
by exceeding a count or rate limit, e.g. word- or bit count limit · CPC title
using arrangements adapted for a specific error detection or correction feature · CPC title
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