Back end of line process integrated optical device fabrication

US10101533B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10101533-B2
Application numberUS-201715826897-A
CountryUS
Kind codeB2
Filing dateNov 30, 2017
Priority dateJun 4, 2015
Publication dateOct 16, 2018
Grant dateOct 16, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An integrated optical device fabricated in the back end of line process located within the vertical span of the metal stack and having one or more advantages over a corresponding integrated optical device fabricated in the silicon on insulator layer.

First claim

Opening claim text (preview).

What is claimed is: 1. An optical device, comprising: a substrate; a device layer on the substrate; a first layer comprising a dielectric over the device layer; a second layer comprising a first stop layer on the first layer; a third layer comprising a dielectric over the first stop layer; a fourth layer comprising a second stop layer on the third layer; a metal stack for connection to external contacts including a first metal portion in a first portion of the third layer, and a first metal via for connecting the first metal portion to the device layer; an optical coupler comprising a waveguide in a portion of at least one of the first or the second stop layers for coupling light into or out of the device layer. 2. The device according to claim 1 , wherein the optical coupler comprises a first waveguide in a portion of the first stop layer, and a second waveguide in a portion of the second stop layer for coupling light into or out of the device layer. 3. The device according to claim 2 , further comprising: a fifth layer comprising a dielectric over the second stop layer; and a sixth layer comprising a third stop layer over the fifth layer; a seventh layer comprising a dielectric over the third stop layer; wherein the optical coupler comprises a third waveguide in a portion of the third stop layer; and wherein the metal stack includes a second metal portion in a first portion of the seventh layer, and a second metal via for connecting the second metal portion to the device layer. 4. The device according to claim 3 , wherein the third waveguide comprises an arrayed waveguide grating (AWG). 5. The device according to claim 4 , wherein the AWG is more than 4 micrometers from the device layer. 6. The device according to claim 4 , wherein the third waveguide comprises a multimode interference coupler. 7. The device according to claim 2 , wherein at least one of the first and second waveguide comprises a tapered waveguide. 8. The device according to claim 2 , wherein a first portion of the second waveguide comprises an edge coupler, and wherein a second portion of second waveguide and a first portion of the first waveguide comprise a vertical coupler. 9. The device according to claim 2 , further comprising: a fifth layer comprising a dielectric over the second stop layer; wherein the optical coupler includes a material deposited within the fifth layer. 10. The device according to claim 9 , wherein the material comprises at least one selected from the group consisting of silicon nitride, amorphous silicon, poly-silicon, silicon oxynitride, silicon-germanium (SiGe), SiO 2 , silicate glass, and germanium (Ge). 11. The device according to claim 9 , wherein the material comprises a silicate glass comprising SiO 2 , and at least one of P 2 O 5 , B 2 O 3 , F, Al 2 O 3 , As 2 O 3 , GeO 2 , N 2 , TiO 2 , ZrO 2 , Nd 2 O 3 , Er 2 O 3 , and Yb 2 O 3 . 12. The device according to claim 2 , wherein the first and second waveguides comprise at least one of silicon nitride, poly-silicon, silicon oxynitride (SiON), amorphous silicon, silicon-germanium (SiGe), SiO 2 , silicate glass, and germanium (Ge). 13. An integrated semiconductor device, comprising: a substrate; a device layer on the substrate; a first layer comprising a dielectric over the device layer; a second layer comprising a first stop layer on the first layer; a third layer comprising a dielectric over the first stop layer; a fourth layer comprising a second stop layer on the third layer; a metal stack for connection with external contacts, including a first metal portion in a first portion of the third layer extending between the second and fourth layers, and a first metal via extending between the first metal portion and the device layer; an optical coupler including a first waveguide in a second portion of the third layer for coupling light to or from the at least one device layer. 14. The device according to claim 13 , further comprising: a fifth layer comprising a dielectric over the fourth layer; a sixth layer comprising a third stop layer over the fifth layer; a seventh layer comprising a dielectric on the sixth layer; wherein the metal stack includes a second metal portion in a first portion of the seventh layer, and second metal via for connecting the second metal portion to the device layer; wherein the optical coupler includes a second waveguide in a second portion of the seventh layer. 15. The device according to claim 13 , wherein the first and second waveguides comprise a material having a first index of refraction greater than a second index of refraction of an oxide material in the third and seventh layers surrounding the first and second waveguides. 16. The device according to claim 15 , wherein the first and second waveguides comprise doped oxide material in the third and seventh layers. 17. The device according to claim 16 , wherein the doped oxide material includes at least one doping material selected from the group consisting of B, F, Al, Ti, As, P, Er, Ni, Si, Cu, Zn, Ge, N, Zr, Nd, and Yb. 18. The device according to claim 13 , wherein the first stop layer comprises one of: an etch stop layer; and a chemical mechanical planarization stop layer. 19. The device according to claim 13 , wherein the first and second stop layers comprise at least one of silicon nitride, poly-silicon, and silicon oxynitride (SiON).

Assignees

Inventors

Classifications

  • G02B6/134Primary

    by substitution by dopant atoms · CPC title

  • high refractive index type, i.e. high-contrast waveguides · CPC title

  • and having an integrated mode-size expanding section, e.g. tapered waveguide · CPC title

  • by etching · CPC title

  • Three-dimensional structures · CPC title

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Frequently asked questions

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What does patent US10101533B2 cover?
An integrated optical device fabricated in the back end of line process located within the vertical span of the metal stack and having one or more advantages over a corresponding integrated optical device fabricated in the silicon on insulator layer.
Who is the assignee on this patent?
Elenion Tech Llc
What technology area does this patent fall under?
Primary CPC classification G02B6/134. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Oct 16 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 7 related publications on this page (citations in our corpus or others sharing the same primary CPC).