Ripple reduction method for chopper amplifiers

Patent metadata

Field	Value
Publication number	US-10097146-B2
Application number	US-201715430139-A
Country	US
Kind code	B2
Filing date	Feb 10, 2017
Priority date	Sep 29, 2016
Publication date	Oct 9, 2018
Grant date	Oct 9, 2018

Abstract

An electrical circuit comprising a modulating chopper configured to receive a differential input signal at a first frequency and modulate the differential input signal to a second frequency to form a modulated differential signal, a null amplifier coupled to the modulating chopper and configured to amplify the modulated differential signal to form an amplifier output, wherein amplifying the modulated differential signal causes a ripple in the amplifier output, a demodulating chopper coupled to the null amplifier and configured to demodulate the amplifier output to form a demodulated differential signal having a first portion at the first frequency and a second portion at a third frequency, an integrator coupled to the demodulating chopper and configured to integrate the demodulated differential signal to form an integrated differential signal, and an attenuator coupled to the integrator and configured to attenuate the integrated differential signal to compensate for at least part of the ripple.

First claim

What is claimed is:

1. A system, comprising:
a main amplifier configured to amplify a differential input signal to form an amplified differential signal output, the main amplifier having a first offset; and
a ripple reduction loop coupled to the main amplifier and configured to compensate for the first offset of the main amplifier, the ripple reduction loop comprising:
a modulating chopper configured to:
receive the differential input signal; and
manipulate the differential input signal based on a first control signal to generate a modulated differential signal;

a null amplifier coupled to the modulating chopper and configured to process the modulated differential signal to generate an amplifier output, the null amplifier having a second offset;
a demodulating chopper coupled to the null amplifier and configured to manipulate the amplifier output based on a second control signal to generate a demodulated differential signal;
an integrator coupled to the demodulating chopper and configured to manipulate the demodulated differential signal to form an integrated differential signal configured to compensate for the second offset; and
an attenuator coupled to the integrator and configured to:
attenuate the integrated differential signal to reduce an amplitude of the integrated differential signal to form an attenuated differential signal; and
transmit the attenuated differential signal to the main amplifier to compensate for the first offset.

2. The system of claim 1 , further comprising a filter coupled between the demodulating chopper and the integrator and configured to filter the demodulated differential signal.

3. The system of claim 1 , wherein a common mode voltage of the differential input signal is greater than a supply voltage of the system.

4. The system of claim 1 , wherein the first control signal and the second control signal have a same frequency.

5. The system of claim 1 , wherein a plurality of resistors are coupled to the attenuator, wherein the attenuator attenuates the integrated differential signal according to an attenuation factor, and wherein the attenuation factor is based at least in part on the plurality of resistors.

6. The system of claim 1 , wherein transmitting the attenuated differential signal to the main amplifier to compensate for the first offset reduces the first offset in the amplified differential signal output to less than approximately +/−15 microvolts (μV).

7. The system of claim 6 , wherein transmitting the attenuated differential signal to the main amplifier to compensate for the first offset reduces the first offset in the amplified differential signal output to less than approximately +/−11 μV.

8. The system of claim 1 , wherein the modulating chopper and the demodulating chopper each comprise a transmission gate.

9. A method, comprising:
receiving a differential input signal;
processing the differential input signal to produce a modulated differential signal;
processing the modulated differential signal to produce an amplified differential signal configured to compensate for an amplifier offset, wherein processing the modulated differential signal causes a ripple in the amplified differential signal;
processing the amplified differential signal to produce a demodulated differential signal, wherein a portion of the demodulated differential signal resulting from the differential input signal has a first frequency, and wherein a portion of the demodulated differential signal resulting from the ripple has a second frequency;
filtering the compensated signal through a filter to compensate for at least part of the ripple at the second frequency;
integrating the filtered demodulated differential signal to produce an integrated differential signal configured to compensate for at least part of the ripple; and
attenuating the integrated differential signal to reduce a peak-to-peak voltage of the ripple.

10. The method of claim 9 , wherein compensating for the amplifier offset reduces the amplifier offset to less than approximately +/−11 microvolts (μV) of zero offset.

11. The method of claim 9 , further comprising transmitting the attenuated differential signal to the amplifier to compensate for at least part of the amplifier offset.

12. An electrical circuit, comprising:
a modulating chopper configured to:
receive a differential input signal at a first frequency; and
modulate the differential input signal to a second frequency to form a modulated differential signal;

a null amplifier coupled to the modulating chopper and configured to amplify the modulated differential signal to form an amplifier output, wherein amplifying the modulated differential signal causes a ripple in the amplifier output;
a demodulating chopper coupled to the null amplifier and configured to demodulate the amplifier output to form a demodulated differential signal having a first portion at the first frequency and a second portion at a third frequency;
an integrator coupled to the demodulating chopper and configured to integrate the demodulated differential signal to form an integrated differential signal; and
an attenuator coupled to the integrator and configured to attenuate the integrated differential signal to form an attenuated differential signal to compensate for at least a portion of the ripple,
wherein the electrical circuit is coupled to an amplifier via a secondary amplifier path and configured to transmit the attenuated differential signal to the amplifier via the secondary amplifier path to compensate for an offset on a first amplifier path of the amplifier.

13. The electrical circuit of claim 12 , further comprising a filter coupled between the demodulating chopper and the integrator and configured to filter the demodulated differential signal.

14. The electrical circuit of claim 12 , wherein the first portion has a relationship to the differential input signal, and wherein the second portion has a relationship to the ripple.

15. The electrical circuit of claim 12 , wherein a plurality of capacitors are coupled to the integrator, and wherein an amplitude of the integrated differential signal is determined at least in part according to the plurality of capacitors.

16. The electrical circuit of claim 12 , wherein a plurality of resistors are coupled to the attenuator, and wherein an amount of attenuation of the attenuator is determined at least in part according to the plurality of resistors.

Assignees

• Semiconductor Components Ind Llc

Inventors

• Stan Matei Nicolae
• BRINZOI Pavel-Viorel

Classifications

• H03F3/45475

  using IC blocks as the active amplifying circuit · CPC title

• H03F2203/45212

  the differential amplifier being designed to have a reduced offset · CPC title

• H03F2200/271

  the DC-isolation amplifier, e.g. chopper amplifier, modulation/demodulation amplifier, uses capacitive isolation means, e.g. capacitors · CPC title

• H03F3/387 Primary

  with semiconductor devices only · CPC title

• H03F3/45968

  by offset reduction · CPC title