Dynamic addressing

US10089273B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10089273-B2
Application numberUS-201615235135-A
CountryUS
Kind codeB2
Filing dateAug 12, 2016
Priority dateAug 14, 2015
Publication dateOct 2, 2018
Grant dateOct 2, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

This invention relates to a dynamically addressable master-slave system and a method for dynamic addressing of slave units, wherein a master unit and a plurality of slave units are provided and the slave units are connected to the master unit via a bus system and can receive at least one broadcast command from the master unit via the bus line of the bus system, wherein the master-slave system is configured such that the master unit can send respective broadcast commands to the slave units, on the one hand, for activation, and on the other hand, for performing the dynamic addressing process of slave addresses, and wherein the slave units each comprise an address input and an address output and are serially connected via an address line that is separate from the bus line.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method for dynamic addressing of n slave units of a master-slave systems including a master unit and a number of n slave units, wherein the slave units are connected to the master unit via a bus system and can receive at least one broadcast command from the master unit via the bus line of the bus system, wherein the master-slave system is configured such that the master unit can send respective broadcast commands to the slave units, on the one hand, for activation, and on the other hand, for performing the dynamic addressing process of slave addresses, and wherein the slave units each comprise an address input and an address output and are serially connected via an address line separate from the bus line, the method comprising the following steps: activating of the dynamic addressing process is performed using a first broadcast command to all slave units; assigning an identical start valve address to all slave units via a bus line; performing the addressing process by increasing the input-side address value of a respective slave address of the ith slave unit by the value “1” as soon as a signal is received at the address input of the adjacent slave unit; after increasing the respective slave address of the ith slave unit, a signal at the address output is conducted to the address input of the adjacent slave unit, and the dynamic addressing process is repeated until the last address change was performed at the nth slave unit; transmitting a signal from the nth slave unit to the master unit at its output via a return line after its nth addressing, as a result the master unit detects the completion of the addressing method. 2. The method according to claim 1 , wherein the signal in the addressing process is forwarded via the address line from the one to the next slave unit using analog signals, bit-coded digital signals, signal pulse sequences, or optical signals. 3. The method according to claim 1 , wherein n slave units are provided, wherein the address output of the n−1 slave units is connected to the address input of the respective serially adjacent slave unit. 4. The method according to claim 1 , wherein activation is followed by the dynamic addressing process using the first or using another broadcast command to all slave units, wherein address allocation to the 2nd to nth slave units is performed via the address line. 5. The method according to claim 1 , wherein as soon as the slave address of the ith slave unit receives a signal at the address input from the adjacent (i−1)th slave unit and adjusts its current address value accordingly, the address value at the address input is increased by the value “1”, respectively. 6. The method according to claim 1 , wherein after increasing the slave address (A i ) of the ith slave unit, a signal at the address output is conducted to the address input of the adjacent (i+1)th slave unit, and the dynamic addressing process is repeated until n−1 address changes starting from the start value were performed at the nth slave unit. 7. The method according to claim 1 , wherein the first slave unit is not connected to the address line but gets its address via a broadcast command via the bus line. 8. The method according to claim 1 , wherein the first slave unit is connected via an address line to the master unit to get its address via the address line from the master unit. 9. The method according to claim 1 , wherein the output of the last slave unit in the serial arrangement is connected to the master unit via a return line.

Assignees

Inventors

Classifications

  • Flexible bus arrangements (arrangements for maintenance or administration involving management of faults; events, alarms H04L41/06; automatic restoration of network faults H04L41/0654) · CPC title

  • on a serial bus, e.g. I2C bus, SPI bus (on daisy chain buses G06F13/4247) · CPC title

  • G06F13/404Primary

    with address mapping · CPC title

  • Configuration or reconfiguration · CPC title

  • with centralised control, e.g. polling · CPC title

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Frequently asked questions

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What does patent US10089273B2 cover?
This invention relates to a dynamically addressable master-slave system and a method for dynamic addressing of slave units, wherein a master unit and a plurality of slave units are provided and the slave units are connected to the master unit via a bus system and can receive at least one broadcast command from the master unit via the bus line of the bus system, wherein the master-slave system i…
Who is the assignee on this patent?
Ebm Papst Mulfingen Gmbh & Co Kg
What technology area does this patent fall under?
Primary CPC classification G06F13/404. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Oct 02 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).