Thermal monitoring of memory resources

Patent metadata

Field	Value
Publication number	US-10088880-B2
Application number	US-201514837372-A
Country	US
Kind code	B2
Filing date	Aug 27, 2015
Priority date	Aug 27, 2015
Publication date	Oct 2, 2018
Grant date	Oct 2, 2018

Abstract

Data reliability and integrity may be compromised when memory resources used to store the data reach elevated temperatures. A sensor in the memory resource may monitor the temperature of the memory resource in real-time. A comparator in the memory resource may indicate a high temperature condition to a memory controller. The memory controller, in response to the high temperature condition, can restrict or halt data flow to the memory resource. When the real-time temperature of the memory resource falls below a defined threshold, the memory controller may resume data flow to the memory resource.

First claim

What is claimed:

1. A memory resource thermal monitoring system, comprising:
a plurality of memory circuits, each of the plurality of memory circuits including:
a status register to receive data indicative of a thermal state of a respective memory circuit;
a first output pin;
at least one thermal sensor, disposed in the memory circuit, the at least one thermal sensor to measure a real-time temperature of the respective memory circuit; and
at least one comparator circuit disposed in the memory circuit, the at least one comparator coupled to the status register, the first output pin, and the at least one thermal sensor, the at least one comparator to:
receive, from the at least one thermal sensor, a real-time measured temperature of the memory circuit;
determine whether the received real-time measured temperature of the memory circuit is at or above a first threshold temperature;
responsive to a determination that the real-time measured temperature of the memory circuit is at or above the first threshold temperature:
set the first output pin in the memory circuit to a first logical state; and
write data indicative of a high temperature condition to the status register; and

determine whether the received real-time measured temperature of the memory circuit is at or below a second threshold temperature;
responsive to a determination that the real-time measured temperature of the memory circuit is at or below the second threshold temperature, set the first output pin to a second logical state; and

thermal management control circuitry coupled to each of the plurality of memory circuits, the thermal management control circuitry to, responsive to detection of at least one of the plurality of memory circuits having the first output pin in the first logical state:
read data from the status register in each of the plurality of memory circuits to identify the memory circuit having the high temperature condition; and
restrict data flow to or from the identified memory circuit while the first output pin in the respective memory circuit remains in the first logical state.

2. The system of claim 1 , the thermal management control circuitry to further:
resume data flow to the identified memory circuit responsive to receipt of a signal that includes data indicative of the first output pin in the identified memory circuit having the second logical state.

3. The system of claim 1 , the thermal management control circuitry to further:
stepwise adjust data flow to or from the identified memory circuit, the stepwise adjustments based at least in part on the real-time measured temperature of the identified memory circuit, when the first output pin in the identified memory circuit is in the first logical state.

4. The system of claim 1 wherein each of the plurality of memory circuits comprises at least one of: a phase change memory (PCM), a byte addressable three dimensional cross point memory, a resistive memory, a nanowire memory, a ferro-electric transistor random access memory (FeTRAM), a magnetoresistive random access memory (MRAM) memory that incorporates memristor technology, a spin transfer torque (STT)-MRAM, or a byte addressable random access non-volatile memory.

5. The system of claim 1 , the thermal management control circuitry to further:
overwrite data indicative of a high temperature condition in the status register of the identified memory circuit responsive to the at least one comparator circuit disposed in the identified memory circuit setting the first output pin to the second logical state.

6. A memory resource thermal management control circuit, comprising:
a communications interface;
thermal management control circuitry coupled to a plurality of memory circuits via the communications interface, the thermal management control circuitry to:
receive a signal that includes data representative of a high temperature indicator from at least one of the plurality of memory circuits;
wherein a comparator circuit disposed in the at least one memory circuit generates the signal that includes the data representative of the high temperature indicator;
wherein the comparator circuit generates the signal that includes the data representative of the high temperature indicator responsive to a determination that a measured real-time temperature of the at least one memory circuit meets or exceeds a first threshold temperature;
wherein the comparator circuit generates the signal that includes the data representative of the high temperature indicator by causing a first output pin in the at least one memory circuit to enter a first logical state;

read a status register in each of the plurality of memory circuits to identify the at least one memory circuit having the measured real-time temperature that meets or exceeds the first threshold temperature responsive to a receipt of the signal indicative of the high temperature from the at least one of the plurality of memory circuits;
wherein the status register contains data generated by the comparator circuit in the at least one memory circuit; and

restrict data flow to the identified at least one memory circuit responsive to the receipt of the high temperature indicator from the at least one memory circuit.

7. The memory resource thermal management control circuit of claim 6 , the thermal management control circuitry to further:
receive a signal that includes data representative of a low temperature indicator from the identified memory circuit, the low temperature indicator generated by the comparator circuit disposed in the identified memory circuit, the low temperature indicator indicative of a measured temperature of the at least one memory circuit at or below a second threshold temperature;
wherein the comparator circuit generates the signal that includes the data representative of the low temperature indicator by causing the first output pin in the at least one memory circuit to enter a second logical state.

8. The memory resource thermal management control circuit of claim 7 , the thermal management control circuitry to further:
responsive to the receipt of the signal that includes data representative of the high temperature indicator from the identified memory circuit, write data indicative of a high temperature condition to a status register in the identified memory circuit.

9. The memory resource thermal management control circuitry of claim 8 , the thermal management control circuit to further:
overwrite the data indicative of the high temperature indicator in the status register responsive to receipt of a signal that includes data indicative of the first output pin in the identified memory circuit having the second logical state.

10. The memory resource thermal management control circuit of claim 7 , the thermal management control circuitry to further:
write data indicative of the first threshold temperature to each of at least some of the plurality of memory circuits.

11. The memory resource thermal management control circuit of claim 10 , the thermal management control circuitry to further:
write data indicative of the second threshold temperature to each of at least some of the plurality of memory circuits.

12. The memory resource thermal management control circuit of claim 7 , the thermal management control circuitry to further:
resume data flow to the identified memory circuit responsive to receipt of a signal, by the thermal management control circuitry, that includes data indicative of the first output pin in the identified memory circuit having the second logical state.

13. A memory resource thermal monitoring method, comprising:
measuring, by a thermal sensor d

Assignees

• Intel Corp

Inventors

• Sundaram Rajesh
• Swaminathan Muthukumar P
• Rivers Doyle

Classifications

• G06F1/3225

  of memory devices · CPC title

• G06F1/206 Primary

  comprising thermal management · CPC title

• G06F11/3037

  where the computing system component is a memory, e.g. virtual memory, cache (accessing, addressing or allocating within memory systems or architectures G06F12/00; checking stores for correct operation G11C29/00) · CPC title

• G06F1/20

  Cooling means · CPC title

• G06F11/3058

  Monitoring arrangements for monitoring environmental properties or parameters of the computing system or of the computing system component, e.g. monitoring of power, currents, temperature, humidity, position, vibrations (thermal management in cooling arrangements of a computing system G06F1/206) · CPC title