Direct chip attach using embedded traces

Patent metadata

Field	Value
Publication number	US-10085341-B2
Application number	US-201715461406-A
Country	US
Kind code	B2
Filing date	Mar 16, 2017
Priority date	Sep 28, 2013
Publication date	Sep 25, 2018
Grant date	Sep 25, 2018

Abstract

A circuit board upon which to mount an integrated circuit chip may include a first interconnect zone on the surface of the circuit board having first contacts with a first pitch, and a second interconnect zone, surrounding the first zone, having second contacts or traces with a second pitch that is smaller than the first pitch. The first contacts may have a design rule (DR) for direct chip attachment (DCA) to an integrated circuit chip. The first contacts may be formed by bonding a sacrificial substrate having the first contacts to a surface of the board; or by laser scribing trenches where the conductor will be plated to create the first contacts. Such a board allows DCA of smaller footprint processor chips for devices, such as tablet computers, cell phones, smart phones, and value phone devices.

First claim

What is claimed is:

1. A circuit board upon which to mount an integrated circuit chip, the circuit board comprising:
a first interconnect zone on a surface of the circuit board, the first interconnect zone having a first area on the surface of the circuit board, the first interconnect zone including a first plurality of contacts having a first pitch of immediately adjacent contacts at the surface of the circuit board, the first interconnect zone having a perimeter;
a second interconnect zone on a surface of the circuit board, the second interconnect zone having a second area on the surface of the circuit board, the second area surrounding all sides of the perimeter of the first area on the surface, the second interconnect zone including a second plurality of contacts or traces having a second pitch of immediately adjacent contacts or traces at the surface of the circuit board, wherein the first pitch is smaller than the second pitch.

2. The circuit board of claim 1 , wherein the circuit board comprises a plurality of interconnect layers, each interconnect layer including a layer of dielectric material, a plurality of interconnects at a first surface of the layer of dielectric material and a plurality of contacts at a second surface of the layer of dielectric material, wherein the interconnects are attached to the contacts.

3. The circuit board of claim 1 , wherein the first plurality of contacts satisfy a design rule appropriate for direct chip attachment (DCA) of integrated circuit chip contacts to contacts of a substrate package to be mounted onto a circuit board; and wherein the second plurality of contacts or traces satisfy a design rule appropriate for direct attachment of substrate package contacts to contacts of a motherboard.

4. The circuit board of claim 1 , wherein the first pitch comprises a first pitch distance between midpoints of the first plurality of contacts of between 120 microns and 160 microns; and wherein the second pitch comprises a second pitch distance between midpoints of the second plurality of contacts or traces of between 390 microns and 410 microns.

5. The circuit board of claim 1 , wherein the perimeter of the first zone is a first square outer perimeter having first side lengths of between 9 mm and 11 mm; and wherein the second zone comprises a second square outer perimeter having second side lengths of between 14 mm and 18 mm.

6. The circuit board of claim 1 , further comprising:
an integrated circuit chip having contacts of the chip direct chip attached to the first plurality of contacts; and
the circuit board mounted in one of a tablet computer, a smartphone, and a value phone.

7. A system comprising:
a circuit board comprising
a first interconnect zone on a surface of the circuit board, the first interconnect zone having a first area on the surface of the circuit board, the first interconnect zone including a first plurality of contacts having a first pitch of immediately adjacent contacts at the surface of the circuit board, the first interconnect zone having a perimeter;
a second interconnect zone on a surface of the circuit board, the second interconnect zone having a second area on the surface of the circuit board, the second area surrounding all sides of the perimeter of the first area on the surface, the second interconnect zone including a second plurality of contacts or traces having a second pitch of immediately adjacent contacts or traces at the surface of the circuit board, wherein the first pitch is smaller than the second pitch; and
an integrated circuit chip having contacts of the chip direct chip attached to the first plurality of contacts.

8. The system of claim 7 , further comprising:
the circuit board mounted in one of a table computer, a smartphone, and a value phone.

9. A circuit board upon which to mount an integrated circuit chip, the circuit board comprising:
a first interconnect zone on a surface of the circuit board, the first interconnect zone having a first area on the surface of the circuit board, the first interconnect zone including a first plurality of contacts having a first pitch at the surface of the circuit board;
a second interconnect zone on a surface of the circuit board, the second interconnect zone having a second area on the surface of the circuit board, the second area surrounding the first area on the surface, the second interconnect zone including a second plurality of contacts or traces having a second pitch at the surface of the circuit board, wherein the first pitch is smaller than the second pitch, wherein the first pitch comprises a first pitch distance between midpoints of the first plurality of contacts of between 120 microns and 160 microns, and wherein the second pitch comprises a second pitch distance between midpoints of the second plurality of contacts or traces of between 390 microns and 410 microns.

10. A circuit board upon which to mount an integrated circuit chip, the circuit board comprising:
a first interconnect zone on a surface of the circuit board, the first interconnect zone having a first area on the surface of the circuit board, the first interconnect zone including a first plurality of contacts having a first pitch at the surface of the circuit board;
a second interconnect zone on a surface of the circuit board, the second interconnect zone having a second area on the surface of the circuit board, the second area surrounding the first area on the surface, the second interconnect zone including a second plurality of contacts or traces having a second pitch at the surface of the circuit board, wherein the first pitch is smaller than the second pitch, wherein the first zone comprises a first square outer perimeter having first side lengths of between 9 mm and 11 mm, and wherein the second zone comprises a second square outer perimeter having second side lengths of between 14 mm and 18 mm.

Assignees

• Intel Corp

Inventors

• Roy Mihir K
• Manusharow Mathew J

Classifications

• H05K3/107

  by filling grooves in the support with conductive material (H05K3/045, H05K3/101, H05K3/1258 and H05K3/465 take precedence) · CPC title

• H05K2201/10378

  Interposers · CPC title

• H05K3/0026

  by laser ablation · CPC title

• H05K3/182

  characterised by the patterning method · CPC title

• H05K1/181

  associated with surface mounted components · CPC title