Thin film transistor array substrate and organic light-emitting display device including the same
US-9478586-B2 · Oct 25, 2016 · US
US10084029B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10084029-B2 |
| Application number | US-201615271886-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 21, 2016 |
| Priority date | Mar 27, 2013 |
| Publication date | Sep 25, 2018 |
| Grant date | Sep 25, 2018 |
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A thin film transistor array substrate having a pixel arrangement structure includes a first sub-pixel for displaying a first color and a second sub-pixel for displaying a second color alternately located in a first column, and a third sub-pixel for displaying a third color in a second column adjacent to the first column, and via holes of the first through third sub-pixels in a same row are at different positions.
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What is claimed is: 1. An organic light-emitting display device comprising: a first pixel to emit a first color in a first column; a second pixel to emit a second color and located alternately with the first pixel in the first column; and a third pixel to emit a third color in a second column adjacent to the first column, wherein the third pixel disposed adjacent to at least one of the first pixel and the second pixel, wherein each of the first through third pixels comprises: a first transistor coupled to a first signal line and a second signal line; a second transistor coupled to the first transistor; a first electrode coupled to the second transistor; and a via hole coupling the first electrode and the second transistor; a first insulating layer between a semiconductor layer and a gate electrode of the first transistor and between a semiconductor layer and a gate electrode of the second transistor; and a second insulating layer between the first insulating layer and the gate electrode of the second transistor, wherein at least one selected from a first imaginary straight line connecting respective centers of via holes of the first pixel and the second pixel, and a second imaginary straight line connecting respective centers of via holes of the first pixel and the third pixel are not substantially parallel with the first signal line and the second signal line in a plan view, wherein each of via holes of the first through third pixels is in an insulating layer between the second transistor and the first electrode. 2. The organic light-emitting display device of claim 1 , further comprising a line to supply a voltage for initializing the second transistor. 3. The organic light-emitting display device of claim 2 , wherein the line to supply the voltage for initializing the second transistor is parallel with one of the first signal line and the second signal line. 4. The organic light-emitting display device of claim 1 , wherein the first electrode comprises a first portion corresponding to an opening of a pixel definition layer exposing a part of the first electrode, and a second portion around the first portion and covered by the pixel definition layer. 5. The organic light-emitting display device of claim 4 , wherein the via hole corresponds to the second portion of the first electrode. 6. The organic light-emitting display device of claim 4 , wherein: the via hole of the first pixel is spaced apart in a first direction from the first portion of the first electrode of the first pixel; and the via hole of the second pixel is spaced apart in a second direction from the first portion of the first electrode of the second pixel, the second direction being opposite to the first direction. 7. The organic light-emitting display device of claim 4 , wherein distances between the outermost edges of the first portions of the first pixel and the third pixels are the same. 8. The organic light-emitting display device of claim 4 , further comprising: an organic layer comprising an emissive layer on the first portion of the first electrode; and an opposite electrode on the organic layer. 9. The organic light-emitting display device of claim 1 , further comprising a line to supply a power voltage coupling to the second transistor. 10. The organic light-emitting display device of claim 9 , further comprising: at least one first insulating layer between the first transistor and the line to supply the power voltage; and at least one second insulating layer between the line to supply the power voltage and the first electrode. 11. The organic light-emitting display device of claim 9 , wherein the line to supply the power voltage comprises a first line extending in a first direction and a second line extending in a second direction perpendicular to the first direction. 12. The organic light-emitting display device of claim 11 , wherein the first line is parallel with the first signal line and the second line is parallel with the second signal line. 13. The organic light-emitting display device of claim 4 , wherein an emissive portion corresponds to the first portion of the first electrode. 14. The organic light-emitting display device of claim 13 , wherein the via holes of the first pixel and the second pixel are between the emissive portion of the first pixel and the second pixel. 15. The organic light-emitting display device of claim 1 , wherein each of the via holes of the first through third pixels is overlapped with respective first electrode in a plan view. 16. The organic light-emitting display device of claim 1 , wherein the second transistor comprises a source and a drain, and one of the source and the drain is coupled to the first electrode through at least two contact metals. 17. The organic light-emitting display device of claim 1 , wherein the second transistor comprises a source and a drain, and the source and the drain comprises a same material as one of the first signal line and the second signal line. 18. An organic light-emitting display device comprising: a first pixel to emit a first color in a first column; a second pixel to emit a second color and located alternately with the first pixel in the first column; and a third pixel to emit a third color in a second column adjacent to the first column, wherein the third pixel disposed adjacent to at least one of the first pixel and the second pixel, wherein each of the first through third pixels comprises: a pixel circuit comprising at least one transistor; a first electrode coupled to the pixel circuit; a via hole coupling the first electrode and the pixel circuit; a first insulating layer between a semiconductor layer and a gate electrode of one of the at least one transistor and between a semiconductor layer and a gate electrode of another of the at least one transistor; and a second insulating layer between the first insulating layer and the gate electrode of the other of the at least one transistor, wherein at least one selected from a first imaginary straight line connecting respective centers of via holes of the first pixel and the second pixel, and a second imaginary straight line connecting respective centers of via holes of the first pixel and the third pixel are not substantially parallel with a column direction and a row direction in a plan view, and wherein the one of the at least one transistor overlaps with an opening part of a pixel definition layer on the first electrode exposing a part of the first electrode. 19. An organic light-emitting display device comprising: a first pixel to emit a first color in a first column; a second pixel to emit a second color and located alternately with the first pixel in the first column; and a third pixel to emit a third color in a second column adjacent to the first column, wherein the third pixel disposed adjacent to at least one of the first pixel and the second pixel, wherein each of the first through third pixels comprises: a pixel circuit comprising at least one transistor, and coupled to at least one signal line; a first electrode coupled to the pixel circuit; a via hole coupling the first electrode and the pixel circuit; a first insulating layer between a semiconductor layer and a gate electrode of one of the at least one transistor and between a semiconductor layer and a gate electrode of another of the at least one transistor; and a second insulating layer between the first insulating layer and the gate electrode of the other of the at least one transistor, wherein at least on
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