Thin film transistor array substrate and organic light-emitting display device including the same

Patent metadata

Field	Value
Publication number	US-9478586-B2
Application number	US-201313963987-A
Country	US
Kind code	B2
Filing date	Aug 9, 2013
Priority date	Mar 27, 2013
Publication date	Oct 25, 2016
Grant date	Oct 25, 2016

Abstract

A thin film transistor array substrate having a pixel arrangement structure includes a first sub-pixel for displaying a first color and a second sub-pixel for displaying a second color alternately located in a first column, and a third sub-pixel for displaying a third color in a second column adjacent to the first column, and via holes of the first through third sub-pixels in a same row are at different positions.

First claim

What is claimed is:

1. A thin film transistor array substrate having a pixel arrangement structure comprising a first sub-pixel for displaying a first color and a second sub-pixel for displaying a second color alternately located in a first column, and a third sub-pixel for displaying a third color in a second column adjacent to the first column,
wherein the thin film transistor array substrate comprises:
a scan line extending in a first direction;
a data line extending in a second direction different from the first direction;
a first pixel electrode of the first sub-pixel;
a second pixel electrode of the second sub-pixel;
a third pixel electrode of the third sub-pixel;
a pixel definition layer on the first through third pixel electrodes and having openings exposing a part of each of the first through third pixel electrodes;
a first via hole of the first sub-pixel;
a second via hole of the second sub-pixel; and
a third via hole of the third sub-pixel,
wherein each of the first through third via holes corresponds to a portion of a corresponding pixel electrode that is covered by the pixel definition layer, and
wherein at least one of a first imaginary line connecting of the first via hole and the second via hole and a second imaginary line connecting the first via hole and the third via hole is not substantially parallel with the first direction and the second direction.

2. The thin film transistor array substrate of claim 1 , wherein the third sub-pixel has a height that is two times or more of the height of the first sub-pixel or the second sub-pixel in a column direction.

3. The thin film transistor array substrate of claim 1 , wherein the first pixel electrode comprises a first emissive portion corresponding to a first opening of the pixel definition layer exposing a part of the first pixel electrode, and a first non-emissive portion around the first emissive portion and covered by the pixel definition layer;
the second pixel electrode comprises a second emissive portion corresponding to a second opening of the pixel definition layer exposing a part of the second pixel electrode, and a second non-emissive portion around the second emissive portion and covered by the pixel definition layer; and
the third pixel electrode comprises a third emissive portion corresponding to a third opening of the pixel definition layer exposing a part of the third pixel electrode, and a third non-emissive portion around the third emissive portion and covered by the pixel definition layer.

4. The thin film transistor array substrate of claim 3 , wherein the first via hole is spaced apart in a left lower direction from an outermost edge of the first emissive portion, the second via hole is spaced apart in a right upper direction from an outmost edge of the second emissive portion, and the third via hole is spaced apart in an upper direction from an outermost edge of the third emissive portion.

5. The thin film transistor array substrate of claim 4 , wherein the via holes of the first through third sub-pixels are in a zigzag pattern in a row direction.

6. The thin film transistor array substrate of claim 3 , further comprising:
an organic layer comprising an emissive layer on the first through third emissive portions of the first through third pixel electrodes; and
an opposite electrode on the organic layer.

7. The thin film transistor array substrate of claim 3 , further comprising:
a first pixel circuit coupled to the first pixel electrode through the first via hole;
a second pixel circuit coupled to the second pixel electrode through the second via hole;
a third pixel circuit coupled to the third pixel electrode through the third via hole; and
a driving voltage line between a capacitor of each of the first through third pixel circuits and the data line, and comprising a first line extending in the first direction and a second line extending in the second direction perpendicular to the first direction.

8. The thin film transistor array substrate of claim 7 , wherein the first line of the driving voltage line is coupled between pixel circuits that are adjacent in the first direction, and the second line of the driving voltage line is coupled between pixel circuits that are adjacent in the second direction, so that the driving voltage line has a mesh structure.

9. The thin film transistor array substrate of claim 1 , wherein the first sub-pixel is a red sub-pixel, the second sub-pixel is a green sub-pixel, and the third sub-pixel is a blue sub-pixel.

10. The thin film transistor array substrate of claim 1 , wherein:
the first via hole is at a left side of a first opening of the pixel definition layer exposing a part of the first pixel electrode, in a plan view; and
the second via hole is at a right side of a second opening of the pixel definition layer exposing a part of the second pixel electrode, in a plan view.

11. The thin film transistor array substrate of claim 10 , wherein the third via hole is at an upper side of a third opening of the pixel definition layer exposing a part of the third pixel electrode, in a plan view.

12. An organic light-emitting display device comprising:
a first sub-pixel comprising a first pixel electrode and displaying a first color in a first column;
a second sub-pixel comprising a second pixel electrode and located alternately with the first sub-pixel in the first column and displaying a second color; and
a third sub-pixel comprising a third pixel electrode in a second column adjacent to the first column and displaying a third color,
wherein the first through third sub-pixels respectively comprise first through third via holes;
a pixel definition layer on the first through third pixel electrodes and having openings exposing a part of each of the first through third pixel electrodes;
a scan line extending in a first direction; and
a data line extending in a second direction different from the first direction,
wherein each of the first through third via holes corresponds to a portion of a corresponding pixel electrode that is covered by the pixel definition layer, and
wherein at least one of a first imaginary line connecting the first via hole and the second via hole and a second imaginary line connecting the first via hole and the third via hole in a same row is not substantially parallel with the first direction and the second direction.

13. The organic light-emitting display device of claim 12 , wherein the first through third via holes are formed in a zigzag pattern in a row direction.

14. The organic light-emitting display device of claim 12 , wherein the third sub-pixel has a height that is two times or more of the height of the first sub-pixel or the second sub-pixel in a column direction.

15. The organic light-emitting display device of claim 12 , wherein the first via hole is spaced apart in a left lower direction from a first opening of the pixel definition layer, and the second via hole is spaced apart in a right upper direction from a second opening of the pixel definition layer.

16. The organic light-emitting display device of claim 12 , further comprising:
an organic layer comprising an emissive layer on first through third emissive portions of the first through third pixel electrodes; and
an opposite electrode on the organic layer.

17. The organic light-emitting display device of claim 12 , further comprising:
a first pixel circuit coupled to the first pixel electrode through the first via hole;
a second pixel circuit coupled to the second pixel electrode through the second via hole;
a third pixel circui

Assignees

• Samsung Display Co Ltd

Inventors

• Lee Won-Se

Classifications

• G09G2300/0465

  Improved aperture ratio, e.g. by size reduction of the pixel circuit, e.g. for improving the pixel density or the maximum displayable luminance or brightness · CPC title

• G09G2300/0452

  Details of colour pixel setup, e.g. pixel composed of a red, a blue and two green components · CPC title

• G09G3/3233 Primary

  with pixel circuitry controlling the current through the light-emitting element · CPC title

• G09G2300/0819

  used for counteracting undesired variations, e.g. feedback or autozeroing · CPC title

• G09G2310/0262

  The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes · CPC title