Method of manufacturing an upper electrode of a plasma processing device

US10081090B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10081090-B2
Application numberUS-201615060384-A
CountryUS
Kind codeB2
Filing dateMar 3, 2016
Priority dateAug 11, 2011
Publication dateSep 25, 2018
Grant dateSep 25, 2018

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A method of manufacturing an upper electrode of a plasma processing device includes forming a covering layer having plasma resistance on a surface of a main body portion constituting the upper electrode at a side of the processing space; polishing a surface of the covering layer exposed to the processing space; and after the polishing, blasting the surface of the covering layer polished at the polishing.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of manufacturing an upper electrode of a plasma processing device including a processing vessel configured to define a processing space where plasma is generated, a gas supply unit configured to supply a processing gas into the processing space, a lower electrode provided at a lower side of the processing space, and the upper electrode provided at an upper side of the processing space, the method comprising: forming a covering layer on a lower surface of a main body portion of the upper electrode facing a side of the processing space where an etching process is performed, the covering layer being formed with a material having plasma resistance: after forming the covering layer, polishing a surface of the covering layer exposed to the processing space; and after polishing the covering layer, blasting the surface of the covering layer that has been polished. 2. The method of claim 1 , wherein the covering layer is a Y 2 O 3 layer. 3. The method of claim 1 , wherein the surface of the covering layer that has been polished has a surface area ranging from 20,000 pm 2 to 30,000 pm 2 . 4. The method of claim 1 , wherein ceramic particles are used for blasting the surface of the covering layer and the ceramic particles include at least one of SiO 2 , Al 2 O 3 , Y 2 O 3 , and SiC. 5. The method of claim 1 , wherein, in the polishing the surface of the covering layer, the surface of the covering layer is polished using a polishing pad and a slurry thereby reducing a surface area of the covering layer. 6. The method of claim 5 , wherein the slurry includes diamond abrasive grains.

Assignees

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Classifications

  • by chemical means · CPC title

  • Electrodes · CPC title

  • Selection of abrasive materials {or additives} for abrasive blasts (polishing compositions C09G) · CPC title

  • Glow discharge · CPC title

  • Plasma spraying · CPC title

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What does patent US10081090B2 cover?
A method of manufacturing an upper electrode of a plasma processing device includes forming a covering layer having plasma resistance on a surface of a main body portion constituting the upper electrode at a side of the processing space; polishing a surface of the covering layer exposed to the processing space; and after the polishing, blasting the surface of the covering layer polished at the …
Who is the assignee on this patent?
Tokyo Electron Ltd
What technology area does this patent fall under?
Primary CPC classification B24C1/08. Mapped technology areas include Operations & Transport.
When was this patent published?
Publication date Tue Sep 25 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).