Choke and EMI filter circuits for power factor correction circuits

US10075065B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10075065-B2
Application numberUS-201715487201-A
CountryUS
Kind codeB2
Filing dateApr 13, 2017
Priority dateApr 15, 2016
Publication dateSep 11, 2018
Grant dateSep 11, 2018

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A converter circuit is provided and includes: a first EMI filter connected to AC lines and includes one or more across-the-line capacitors; a charging circuit that receives power from the first EMI filter and limits an amount of current passing from the first EMI filter to a DC bus; and a PFC circuit of a compressor drive that provides PFC between an output of the charging circuit and a generated first DC voltage. The PFC circuit includes: a rectification circuit that rectifies the power from the AC lines or a charging circuit output; and a second EMI filter connected downstream from the rectification circuit and including a DC bus rated capacitor. The second EMI filter outputs a filtered DC signal based on a rectification circuit output. The PFC circuit, based on the second EMI filter output, outputs the first DC voltage to the DC bus to power the compressor drive.

First claim

Opening claim text (preview).

What is claimed is: 1. A converter circuit comprising: a first electromagnetic interference filter connected to alternating current (AC) lines and comprising one or more across-the-line capacitors, wherein the first electromagnetic interference filter comprises an across-the-line capacitor for each phase of an AC input signal; a charging circuit configured to (i) receive power from the first electromagnetic interference filter, and (ii) limit an amount of current passing from the first electromagnetic interference filter to a direct current (DC) bus; and a power factor correction circuit of a compressor drive, wherein the power factor correction circuit is configured to provide power factor correction between an output of the charging circuit and a generated first DC voltage, wherein the power factor correction circuit comprises a rectification circuit configured to rectify the power from the AC lines or the output of the charging circuit depending on whether the rectification circuit is upstream or downstream from the charging circuit, and a second electromagnetic interference filter connected downstream from the rectification circuit and comprising only a single DC bus rated capacitor, wherein the second electromagnetic interference filter is configured to output a filtered DC signal based on an output of the rectification circuit, a capacitance of each of the one or more across-the-line capacitors of the first electromagnetic interference filter is related to a capacitance of the single DC bus rated capacitor of the second electromagnetic interference filter, such that inclusion of the DC bus rated capacitor allows capacitances of each of the one or more across-the-line capacitors to be reduced while not reducing a level of electromagnetic interference filtering, and wherein the power factor correction circuit is configured to, based on the output of the second electromagnetic interference filter, output the first DC voltage to the DC bus to power the compressor drive. 2. The converter circuit of claim 1 , wherein the second electromagnetic interference filter comprises a plurality of DC bus rated capacitors connected in parallel. 3. The converter circuit of claim 1 , further comprising a grounded electromagnetic interference filter comprising line-to-ground capacitors, wherein the grounded electromagnetic interference filter is connected upstream or downstream from the rectification circuit. 4. The converter circuit of claim 3 , wherein the power factor correction circuit comprises the grounded electromagnetic interference filter. 5. The converter circuit of claim 1 , further comprising a first protection circuit configured to provide surge protection, wherein the protection circuit is connected upstream or downstream from the rectification circuit and comprises at least one of a varistor or a gas discharge tube. 6. The converter circuit of claim 5 , wherein the protection circuit is upstream from the rectification circuit to protect the rectification circuit from peak inverse voltage (PIV). 7. The converter circuit of claim 5 , wherein: the power factor correction circuit comprises the first protection circuit; and the first protection circuit provides surge protection. 8. The converter circuit of claim 7 , further comprising a second protection circuit connected upstream from the charging circuit, wherein the second protection circuit comprises surge protection. 9. The converter circuit of claim 8 , wherein the second protection circuit is connected downstream from the first protection circuit. 10. The converter circuit of claim 1 , further comprising a common mode choke, wherein the common mode choke is connected upstream or downstream from the rectification circuit. 11. The converter circuit of claim 10 , wherein the power factor correction circuit comprises the common mode choke. 12. The converter circuit of claim 11 , wherein the power factor correction circuit is connected downstream from the charging circuit. 13. The converter circuit of claim 1 , wherein the converter circuit is void of a line-to-ground capacitor upstream from the rectification circuit. 14. The converter circuit of claim 1 , wherein the rectification circuit comprises: a first bridge rectifier configured to receive an AC voltage; and a second bridge rectifier (i) receives the AC voltage, and (ii) bypasses at least one of the first bridge rectifier, a choke, and a diode of the power factor correction circuit to provide a rectified AC voltage out of the second bridge rectifier to the DC bus. 15. The converter circuit of claim 14 , wherein the first bridge rectifier and the second bridge rectifier are each 3-phase bridge rectifiers. 16. The converter circuit of claim 14 , wherein the power factor correction circuit comprises: a power converter comprising a switch and configured to (i) receive an output of the first bridge rectifier, (ii) convert the output of the first bridge rectifier to a second DC voltage, and (iii) supply the second DC voltage to the DC bus; and a control module configured to control operation of a driver to transition the switch between an open state and a closed state to adjust the first DC voltage on the DC bus, wherein the first DC voltage, depending on the AC voltage and the first DC voltage, is based on at least one of (i) the rectified AC voltage, and (ii) the second DC voltage. 17. The converter circuit of claim 1 , further comprising a switched bridge circuit, wherein: the rectification circuit comprises a bridge rectifier configured to receive an AC voltage; the switched bridge circuit comprising a plurality of switches; a driver generating control signals to control states of the plurality of switches; and a control module configured to control operation of the driver. 18. The converter circuit of claim 17 , wherein: the switched bridge circuit comprises a plurality of diodes; the plurality of switches include pairs of switches, wherein each of the pairs of switches include two switches connected in series, wherein the pairs of switches are connected in parallel between the DC bus and a reference terminal; and each of the plurality of diodes is connected across a respective one of the plurality of switches. 19. The converter circuit of claim 1 , further comprising a protection circuit configured to provide surge protection, wherein the protection circuit is connected downstream from the rectification circuit and comprises at least one of a varistor or a gas discharge tube. 20. The converter circuit of claim 1 , wherein the converter circuit is void of an line-to-ground capacitor upstream of the rectification circuit. 21. A converter circuit comprising: a first electromagnetic interference filter connected to alternating current (AC) lines and comprising one or more across-the-line capacitors; a charging circuit configured to (i) receive power from the first electromagnetic interference filter, and (ii) limit an amount of current passing from the first electromagnetic interference filter to a direct current (DC) bus; a power factor correction circuit of a compressor drive, wherein the power factor correction circuit is configured to provide power factor correction between an output of the charging circuit and a generated first DC voltage, wherein the power factor correction circuit comprises a rectification circuit configured to rectify the power from the AC lines or the output of the charging circuit depending on whether the rectification circuit is upstream or down

Assignees

Inventors

Classifications

  • using discharge tubes without control electrode or semiconductor devices without control electrode · CPC title

  • operating from a three-phase input voltage (H02M1/4233 takes precedence) · CPC title

  • Means for protecting converters other than automatic disconnection · CPC title

  • H02M1/44Primary

    Circuits or arrangements for compensating for electromagnetic interference in converters or inverters · CPC title

  • Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US10075065B2 cover?
A converter circuit is provided and includes: a first EMI filter connected to AC lines and includes one or more across-the-line capacitors; a charging circuit that receives power from the first EMI filter and limits an amount of current passing from the first EMI filter to a DC bus; and a PFC circuit of a compressor drive that provides PFC between an output of the charging circuit and a generat…
Who is the assignee on this patent?
Emerson Climate Technologies
What technology area does this patent fall under?
Primary CPC classification H02M1/44. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 11 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).