Methods and systems for reducing conducted electromagnetic interference

Patent metadata

Field	Value
Publication number	US-9300241-B2
Application number	US-201414559378-A
Country	US
Kind code	B2
Filing date	Dec 3, 2014
Priority date	Sep 11, 2012
Publication date	Mar 29, 2016
Grant date	Mar 29, 2016

Abstract

A drive circuit is provided for reducing conducted electromagnetic interference provided by a power line to a motor controller. The drive circuit includes an EMI filter having first and second EMI filter input terminals, and first and second EMI filter output terminals. The first input terminal is configured to be coupled to a first AC line output and the second input terminal is configured to be coupled to a second AC line output. The drive circuit includes a rectifier portion having first and rectifier input terminals coupled to the first and second EMI output terminals, respectively. The drive circuit includes at least two series-coupled filter capacitors after the rectifier portion and a PFC choke coupled at a first end to one of the EMI filter output terminals and to one of the first and second rectifier input terminals, and at a second end between the series-coupled filter capacitors.

First claim

What is claimed is:

1. A drive circuit for electromagnetic interference (EMI) reduction provided by a power line to a motor controller, the power line comprising at least a first alternating current (AC) line output and a second AC line output, said drive circuit comprising:
an EMI filter having at least a first EMI filter input terminal, a second EMI filter input terminal, a first EMI filter output terminal, and a second EMI filter output terminal, said first EMI filter input terminal configured to be coupled to the first AC line output and said second EMI filter input terminal configured to be coupled to the second AC line output;
a rectifier portion comprising a first rectifier input terminal coupled to said first EMI filter output terminal and a second rectifier input terminal coupled to said second EMI filter output terminal;
at least two series-coupled filter capacitors positioned after said rectifier portion; and
a power factor correction (PFC) choke comprising a first end and a second end, said first end coupled to one of said first and second EMI filter output terminals and to one of said first and second rectifier input terminals, said second end coupled between said at least two series-coupled filter capacitors.

2. A drive circuit in accordance with claim 1 , wherein said rectifier portion is positioned between said EMI filter and said at least two series-coupled filter capacitors.

3. A drive circuit in accordance with claim 1 , further comprising a jumper wire coupled to said second EMI filter output terminal and between said at least two series-coupled filter capacitors.

4. A drive circuit in accordance with claim 3 , wherein said PFC choke is coupled to said jumper wire.

5. A drive circuit in accordance with claim 1 , wherein said PFC choke is configured to produce symmetric EMI voltage distribution between the first AC line output and ground, and the second AC line output and ground.

6. A drive circuit in accordance with claim 1 , wherein said EMI filter comprises a common mode choke and at least one capacitor.

7. A method for assembling a motor controller, wherein the motor controller is coupled to a power line comprising at least a first alternating current (AC) line output and a second AC line output, said method comprising:
providing an EMI filter having at least a first EMI filter input terminal, a second EMI filter input terminal, a first EMI filter output terminal, and a second EMI filter output terminal, the first EMI filter input terminal configured to be coupled to the first AC line output and the second EMI filter input terminal configured to be coupled to the second AC line output;
coupling a rectifier portion to the EMI filter, the rectifier portion including a first rectifier input terminal coupled to the first EMI filter output terminal and a second rectifier input terminal coupled to the second EMI filter output terminal;
coupling at least two filter capacitors in series after the rectifier portion; and
coupling a first end of a power factor correction (PFC) choke to one of the first and second EMI filter output terminals and to one of the first and second rectifier input terminals, and a second end of the PFC choke to a common node between the at least two series-coupled filter capacitors.

8. A method in accordance with claim 7 , wherein coupling the rectifier portion further comprises coupling the rectifier portion between the EMI filter and the at least two series-coupled filter capacitors.

9. A method in accordance with claim 7 , further comprising coupling a jumper wire to the second output terminal and to a common node between the at least two series-coupled filter capacitors.

10. A method in accordance with claim 9 , further comprising coupling the PFC choke to the jumper wire.

11. A method in accordance with claim 7 , further comprising configuring the PFC choke to produce symmetric EMI voltage distribution between the first AC line output and ground, and the second AC line output and ground.

12. A method in accordance with claim 7 , wherein providing the EMI filter comprises providing a common mode choke coupled to at least one capacitor.

13. A motor control system for electromagnetic interference (EMI) reduction provided by a power line to an electric motor, the power line comprising at least a first alternating current (AC) line output and a second AC line output, said motor control system comprising:
a motor controller; and
a drive circuit comprising:
an EMI filter having at least a first EMI filter input terminal, a second EMI filter input terminal, a first EMI filter output terminal, and a second EMI filter output terminal, said first EMI filter input terminal configured to be coupled to the first AC line output and said second EMI filter input terminal configured to be coupled to the second AC line output;
a rectifier portion comprising a first rectifier input terminal coupled to said first EMI filter output terminal and a second rectifier input terminal coupled to said second EMI filter output terminal;
at least two series-coupled filter capacitors positioned after said rectifier portion; and
a power factor correction (PFC) choke comprising a first end and a second end, said first end coupled to one of said first and second EMI filter output terminals and to one of said first and second rectifier input terminals, said second end coupled between said at least two series-coupled filter capacitors.

14. A motor control system in accordance with claim 13 , wherein said rectifier portion is positioned between said EMI filter and said at least two series-coupled filter capacitors.

15. A motor control system in accordance with claim 13 , further comprising a jumper wire coupled to said second output terminal and between said at least two series-coupled filter capacitors, wherein said PFC choke is coupled to said jumper wire.

16. A motor control system in accordance with claim 13 , wherein said PFC choke is configured to produce symmetric EMI voltage distribution between the first AC line output and ground, and the second AC line output and ground.

17. A motor control system in accordance with claim 13 , wherein said EMI filter comprises a common mode choke and at least one capacitor.

Assignees

• Regal Beloit America Inc

Inventors

• Becerra Roger Carlos
• Da Yao

Classifications

• H02M1/126 Primary

  using passive filters · CPC title

• H02M1/4266

  using passive elements · CPC title

• H02P6/14 Primary

  Electronic commutators · CPC title

• H02P29/0038 Primary

  Electricity · mapped topic

• H02P2201/15

  Power factor correction [PFC] circuit generating the DC link voltage for motor driving inverter · CPC title