Semiconductor package with integrated output inductor using conductive clips

Patent metadata

Field	Value
Publication number	US-10074620-B2
Application number	US-201615013858-A
Country	US
Kind code	B2
Filing date	Feb 2, 2016
Priority date	Mar 25, 2015
Publication date	Sep 11, 2018
Grant date	Sep 11, 2018

Abstract

A semiconductor package includes a semiconductor die having a control transistor and a sync transistor, an integrated output inductor having a winding around a core, and coupled to the semiconductor die, where the winding includes a plurality of top conductive clips connected to a plurality of bottom conductive clips. The control transistor and the sync transistor are configured as a half-bridge. The integrated output inductor is coupled to a switched node of the half-bridge. At least one of the plurality of top conductive clips and the plurality of bottom conductive clips includes a partially etched portion and a non-etched portion. The semiconductor die is attached to the integrated output inductor by a die attach material. The semiconductor die and the integrated output inductor are encapsulated in a molding compound.

First claim

The invention claimed is:

1. A semiconductor package comprising:
a semiconductor die comprising a control transistor and a sync transistor;
an integrated output inductor comprising a winding around a core, and coupled to said semiconductor die;
wherein said winding comprises a plurality of top conductive clips connected to a plurality of bottom conductive clips.

2. The semiconductor package of claim 1 wherein said control transistor and said sync transistor are configured as a half-bridge.

3. The semiconductor package of claim 2 wherein said integrated output inductor is coupled to a switched node of said half-bridge.

4. The semiconductor package of claim 1 wherein at least one of said plurality of top conductive clips and said plurality of bottom conductive clips includes a partially etched portion and a non-etched portion.

5. The semiconductor package of claim 1 wherein said semiconductor die further comprises a driver integrated circuit coupled to said control transistor and said sync transistor.

6. The semiconductor package of claim 1 wherein at least one of said control transistor and said sync transistor comprises a group III-V transistor.

7. The semiconductor package of claim 1 wherein at least one of said control transistor and said sync transistor comprises a group IV transistor.

8. The semiconductor package of claim 1 wherein said core is a ferrite core.

9. The semiconductor package of claim 1 wherein said semiconductor die is attached to said integrated output inductor by a die attach material.

10. The semiconductor package of claim 1 wherein said semiconductor die and said integrated output inductor are encapsulated in a molding compound.

11. A semiconductor package comprising:
an integrated output inductor comprising a winding around a core;
a power stage stacked over said integrated output inductor, said power stage comprising a control transistor and a sync transistor connected in a half-bridge;
wherein said winding comprises a plurality of top conductive clips connected to a plurality of bottom conductive clips.

12. The semiconductor package of claim 11 wherein at least one of said plurality of top conductive clips and said plurality of bottom conductive clips includes a partially etched portion and a non-etched portion.

13. The semiconductor package of claim 11 wherein said integrated output inductor is coupled to a switched node of said half-bridge.

14. The semiconductor package of claim 11 wherein said power stage further comprises a driver integrated circuit coupled to said control transistor and said sync transistor.

15. The semiconductor package of claim 11 wherein said core is a ferrite core.

16. The semiconductor package of claim 11 wherein at least one of said control transistor and said sync transistor comprises a group III-V transistor.

17. The semiconductor package of claim 11 wherein at least one of said control transistor and said sync transistor comprises a group IV transistor.

18. The semiconductor package of claim 11 wherein said control transistor and said sync transistor are monolithically integrated on a semiconductor die.

19. The semiconductor package of claim 18 wherein said semiconductor die is attached to said integrated output inductor by a die attach material.

20. The semiconductor package of claim 11 wherein said power stage and said integrated output inductor are encapsulated in a molding compound.

Assignees

• Infineon Technologies Americas Corp

Inventors

• Cho Eung San
• Galipeau Darryl
• Clavette Dan

Classifications

• H10W90/756

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W90/736

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W74/114

  by a substrate and the encapsulations · CPC title

• H10W74/00

  Encapsulations, e.g. protective coatings · CPC title

• H10W72/5525

  comprising copper [Cu] · CPC title