Ramp generation module

Patent metadata

Field	Value
Publication number	US-10069488-B2
Application number	US-201514669321-A
Country	US
Kind code	B2
Filing date	Mar 26, 2015
Priority date	Apr 16, 2014
Publication date	Sep 4, 2018
Grant date	Sep 4, 2018

Abstract

A digitally controlled ramp generator has a constant current source, a first controllable switch coupled between the constant current source and an output node, a capacitor coupled with the output node, a second controllable switch coupled with the output node, a constant current sink coupled with the second controllable switch, and a control unit. The control unit is configured in a first operating mode to select control signals for the first and second controllable switch to generate a rising waveform by charging said capacitor through the first controllable switch and a falling waveform by discharging the capacitor through the second controllable switch wherein the control signals can be selected from the group of a time based control signal and a voltage based control signal. A variety of other control modes may be provided.

First claim

What is claimed is:

1. A digitally controlled ramp generator, comprising:
a constant current source;
a first controllable switch coupled between the constant current source and an output node;
a capacitor coupled with the output node;
a second controllable switch coupled with the output node;
a constant current sink coupled with the second controllable switch; and
a control circuit configured in a first operating mode to select control signals for the first and second controllable switch to generate a rising waveform by charging said capacitor through the first controllable switch and a falling waveform by discharging the capacitor through the second controllable switch;
wherein the control circuit is configured to select the control signals can be selected from a group, the group including a time based control signal and a voltage based control signal and is configured to apply the time based control signal and the voltage based control signal to one or more of the controllable switches; and
wherein the control circuit comprises a state machine receiving input control signals and providing said control signals to said first and second controllable switches depending on an operating mode programmed into said control circuit;
wherein the digitally controlled ramp generator further comprises a first and second multiplexer for selecting respective input control signals.

2. The digitally controlled ramp generator according to claim 1 , further comprising a first comparator coupled with said output node and a first controllable threshold reference voltage.

3. The digitally controlled ramp generator according to claim 2 , further comprising a second comparator coupled with said output node and a second controllable threshold reference voltage.

4. The digitally controlled ramp generator according to claim 3 , wherein the controllable first and second threshold reference voltage is generated by a first and second digital-to-analog converter, respectively.

5. The digitally controlled ramp generator according to claim 2 , wherein the first threshold reference voltage determines a minimum voltage of a waveform.

6. The digitally controlled ramp generator according to claim 2 , wherein the first threshold reference voltage determines a maximum voltage of a waveform.

7. The digitally controlled ramp generator according to claim 1 , wherein the constant current source is a digitally controllable constant current source or the constant current sink is a digitally controllable constant current sink.

8. A microcontroller comprising a digitally controlled ramp generator according to claim 1 .

9. The digitally controlled ramp generator according to claim 1 , wherein the control circuit comprises a state machine receiving said input control signals and providing said control signals to said first and second controllable switches depending on an operating mode programmed into said control circuit.

10. The digitally controlled ramp generator according to claim 1 , further comprising at least one one-shot for providing a one-shot control signal having a predetermined pulse width.

11. A digitally controlled ramp generator, comprising:
a constant current source;
a first controllable switch coupled between the constant current source and an output node;
a capacitor coupled with the output node;
a second controllable switch coupled with the output node;
a constant current sink coupled with the second controllable switch;
a control circuit configured in a first operating mode to select control signals for the first and second controllable switch to generate a rising waveform by charging said capacitor through the first controllable switch and a falling waveform by discharging the capacitor through the second controllable switch;
a reference voltage coupled with said output node via the capacitor; and
a third controllable switch connected in parallel with said capacitor;
wherein:
the control circuit is configured to select the control signals can be selected from a group, the group including a time based control signal and a voltage based control signal and is configured to apply the time based control signal and the voltage based control signal to one or more of the controllable switches;
the control circuit comprises a state machine receiving input control signals and providing said control signals to said first and second controllable switches depending on an operating mode programmed into said control circuit; and
in a second operating mode, the control circuit is configured to select control signals for the third and second controllable switch to generate a rising waveform by charging said capacitor through the third controllable switch and a falling waveform by discharging the capacitor through the second controllable switch wherein the control signals are selected from one of time or voltage based control signals.

12. The digitally controlled ramp generator according to claim 11 , further comprising a first comparator coupled with said output node and a first controllable threshold reference voltage.

13. The digitally controlled ramp generator according to claim 12 , further comprising a second comparator coupled with said output node and a second controllable threshold reference voltage.

14. The digitally controlled ramp generator according to claim 13 , wherein the controllable first and second threshold reference voltage is generated by a first and second digital-to-analog converter, respectively.

15. The digitally controlled ramp generator according to claim 12 , wherein the first threshold reference voltage determines a minimum voltage of a waveform.

16. The digitally controlled ramp generator according to claim 12 , wherein the first threshold reference voltage determines a maximum voltage of a waveform.

17. The digitally controlled ramp generator according to claim 11 , wherein the reference voltage is provided by a digitally controllable reference voltage module.

18. The digitally controlled ramp generator according to claim 11 , where the first controllable switch is controlled by a first voltage reference and the second controllable switch is controlled by a second voltage reference.

19. The digitally controlled ramp generator according to claim 11 , where the first controllable switch is controlled by a first voltage reference and the second controllable switch is controlled by a predefined time signal.

20. The digitally controlled ramp generator according to claim 11 , where the first controllable switch is controlled by a first predefined time signal and the second controllable switch is controlled by a second predefined time signal.

21. A microcontroller comprising a digitally controlled ramp generator according to claim 11 .

22. The digitally controlled ramp generator according to claim 11 , wherein in a third operating mode, the control circuit is configured to select control signals for the third and first controllable switch to generate a rising waveform by charging said capacitor through the first controllable switch and a falling waveform by discharging the capacitor through the third controllable switch wherein the control signals are selected from one of time or voltage based control signals.

23. The digitally controlled ramp generator according to claim 22 , further comprising a first and second multiplexer for selecting respective input control signals.

24. The digitally controlled ramp generator according to claim 2

Assignees

• Microchip Tech Inc

Inventors

• Steedman Sean Stacy
• Yuenyongsgool Yong
• Van Eeden Jacobus Albertus
• Julicher Joseph
• Dracea Marilena

Classifications

• H03K4/50 Primary

  in which a sawtooth voltage is produced across a capacitor · CPC title

• H03K4/502 Primary

  the capacitor being charged from a constant-current source · CPC title