Method and apparatus for transaction recording and visualization

Patent metadata

Field	Value
Publication number	US-10068040-B2
Application number	US-201514791216-A
Country	US
Kind code	B2
Filing date	Jul 2, 2015
Priority date	Mar 29, 2010
Publication date	Sep 4, 2018
Grant date	Sep 4, 2018

Abstract

Methods and apparatus for recording and visualizing transactions of a test bench simulation are disclosed. Transaction-specific data generated from a test bench simulation may be displayed in a sequence diagram view to provide a view of the transactions arranged sequentially in time.

First claim

What is claimed is:

1. A method, comprising:
receiving, at one or more computer systems, information generated in response to a simulation of a device under test with a test bench, the information comprising transactions and transaction passing and temporal relationships between multiple test bench components;
generating, with one or more processors associated with the one or more computer systems, a transaction database as a response to the received information; and
generating and displaying, with the one or more processors associated with the one or more computer systems, an element of a sequence diagram that visually represents both a temporal sequence between two or more data elements of a transaction between at least two test bench components and a transaction passing sequence between each of the two or more data elements according to the transaction database; wherein a transaction represented by an element in the sequence diagram is selected from data passed between two sequencers and data passed between a sequencer and a driver.

2. The method of claim 1 wherein each database transaction comprises a name of the transaction, a start time of the transaction, and an end time of the transaction.

3. The method of claim 1 wherein each database transaction comprises an interface data on which the transaction occurs.

4. The method of claim 1 wherein each database transaction comprises a name of a variable associated with the transaction, and a value for the variable at a selected time.

5. The method of claim 3 wherein the interface comprises a test bench component imitating a request and a test bench component returning a response to the request.

6. The method of claim 1 further comprising generating a waveform view of the simulation using the transaction database.

7. The method of claim 6 further comprising identifying a portion of the waveform corresponding to the time of a transaction represented by an element in the sequence diagram.

8. The method of claim 1 further comprising enabling tracing of a transaction represented by the element of the sequence diagram either forward or backward in time.

9. The method of claim 1 wherein the at least two test bench components are selected from the sequencer and the driver.

10. The method of claim 1 further comprising visually expanding a transaction represented by the element of the sequence diagram into one or more lower-level transactions.

11. The method of claim 1 further comprising collapsing one or more transactions represented by the element of the sequence diagram into a higher-level transaction.

12. The method of claim 1 further comprising displaying attributes of a transaction represented by the sequence diagram.

13. The method of claim 1 further comprising:
receiving source code for the simulation;
generating a source code database;
generating a source code view of the simulation from the source code database;
generating a synchronized source code view based on synchronizing the source code view of the simulation with the sequence diagram; and
and generating information configured to display the synchronized source code view.

14. The method of claim 1 further comprising:
generating a waveform view of the simulation from the transaction database;
generating a synchronized waveform view based on synchronizing the waveform view of the simulation with the sequence diagram; and
generating information configured to display the synchronized waveform view of the simulation.

Assignees

• Synopsys Taiwan Co Ltd
• Synopsys Inc

Inventors

• Chen Yung Chuan
• Lin I-Liang
• Chang Li-Chi
• Patel Bindesh

Classifications

• G06F30/33 Primary

  Design verification, e.g. functional simulation or model checking · CPC title

• G06F11/3672

  Test management · CPC title

• G06F17/5022 Primary

  Physics · mapped topic