Method for heat treatment of silicon single crystal wafer

Patent metadata

Field	Value
Publication number	US-10066322-B2
Application number	US-201715680949-A
Country	US
Kind code	B2
Filing date	Aug 18, 2017
Priority date	Jan 16, 2014
Publication date	Sep 4, 2018
Grant date	Sep 4, 2018

Abstract

A method for a heat treatment of a silicon single crystal wafer in an oxidizing ambient, including: performing the heat treatment based on a condition determined by a tripartite correlation between a heat treatment temperature during the heat treatment, an oxygen concentration in the silicon single crystal wafer before the heat treatment, and a growth condition of a silicon single crystal from which the silicon single crystal wafer is cut out. This provides a method for a heat treatment of a silicon single crystal wafer which can annihilate void defects or micro oxide precipitate nuclei in a silicon single crystal wafer with low cost, efficiently, and securely by a heat treatment in an oxidizing ambient.

First claim

The invention claimed is:

1. A method for a heat treatment of a silicon single crystal wafer in an oxidizing ambient, comprising:
performing the heat treatment based on a condition determined by a tripartite correlation between a heat treatment temperature during the heat treatment, an oxygen concentration in the silicon single crystal wafer before the heat treatment, and a growth condition of a silicon single crystal from which the silicon single crystal wafer is cut out, wherein
the silicon single crystal wafer is cut out from a silicon single crystal without nitrogen-doping, and
the tripartite correlation is represented by the following relational expression (A-1):
T≥ 37.5[Oi]+72.7 I void A +860  (A-1)

wherein, “T” is the heat treatment temperature (° C.), [Oi] is the oxygen concentration (ppma-JEIDA) in the silicon single crystal wafer before the heat treatment, and Ivoid A is represented by the following formula (A-2):
I void A ={( V/G )−( V/G )crt} 1/3 ×{L (1150−1080)/ V} 1/2   (A-2)

wherein, “V” is a growth rate (mm/min), “G” is a temperature gradient near an interface (° C./mm), (V/G)crt is a value of V/G when a defect is nonexistent, L(1150−1080) is a length of a temperature zone of void-defect formation of 1,150° C. to 1,080° C. (mm).

2. The method for a heat treatment of a silicon single crystal wafer according to claim 1 , wherein the silicon single crystal wafer is cut out from a silicon single crystal without a defect due to Interstitial-Si.

3. The method for a heat treatment of a silicon single crystal wafer according to claim 1 , wherein the heat treatment temperature is 900° C. or more and 1,200° C. or less, and a heat treatment time is 1 minute or more and 180 minutes or less.

4. The method for a heat treatment of a silicon single crystal wafer according to claim 1 , wherein the oxygen concentration of the silicon single crystal wafer is 8 ppma-JEIDA or less.

5. The method for a heat treatment of a silicon single crystal wafer according to claim 1 , wherein the thickness of the silicon single crystal wafer is 0.1 mm or more and 20 mm or less.

Assignees

• Shinetsu Handotai Kk

Inventors

• Hoshi Ryoji
• Kamada Hiroyuki

Classifications

• H10P36/03

  within silicon bodies · CPC title

• C30B15/00

  Single-crystal growth by pulling from a melt, e.g. Czochralski method (under a protective fluid C30B27/00) · CPC title

• C30B29/06 Primary

  Silicon · CPC title

• C01B33/02

  Silicon (forming single crystals or homogeneous polycrystalline material with defined structure C30B) · CPC title

• C30B33/02 Primary

  Heat treatment (C30B33/04, C30B33/06 take precedence) · CPC title