Continuous delta-sigma modulator for supporting multi-mode

Patent metadata

Field	Value
Publication number	US-10063252-B2
Application number	US-201815868786-A
Country	US
Kind code	B2
Filing date	Jan 11, 2018
Priority date	Jan 20, 2017
Publication date	Aug 28, 2018
Grant date	Aug 28, 2018

Abstract

A delta-sigma modulator may comprise a loop filter for integrating and outputting a difference between an input signal and an analog signal; a quantizer for quantizing and outputting a signal output from the loop filter; and a digital-to-analog converter (DAC) for outputting the analog signal by digital-to-analog converting a signal output from the quantizer. Also, the loop filter may comprise an operational amplifier; and a circuit including at least one capacitor, at least one resistor, and at least one switch which are connected to the operational amplifier. Also, signal transfer characteristics of the loop filter satisfy a third-order transfer function or a second-order transfer function by turning on or off the at least one switch.

First claim

What is claimed is:

1. A loop filter comprising:
an operational amplifier; and
a circuit including at least one capacitor, at least one resistor, and at least one switch which are connected to the operational amplifier,
wherein signal transfer characteristics of the loop filter satisfy a third-order transfer function or a second-order transfer function by turning on or off the at least one switch, and
wherein the circuit further includes:
a first inverting circuit for outputting an inverted signal by inverting an input signal of the loop filter; and
a second inverting circuit for outputting an inverted signal by inverting a signal output from an output end of the operational amplifier.

2. The loop filter according to claim 1 , wherein the circuit further includes a first capacitor, a second capacitor, and a third capacitor which are connected in series between a first input end of the operational amplifier and the output end of the operational amplifier.

3. The loop filter according to claim 1 , wherein the circuit further includes:
a first resistor having one end connected to a third node to which the input signal of the loop filter is applied and having another end connected to a first input end of the operational amplifier;
a second resistor, a fourth resistor, and a sixth resistor each having one end connected to a first node between a first capacitor and a second capacitor; and
a third resistor, a fifth resistor, and a seventh resistor each having one end connected to a second node between the second capacitor and a third capacitor.

4. The loop filter according to claim 3 ,
wherein another end of each of the second resistor and the third resistor is connected to a ground, another end of the fourth resistor is connected to the output end of the operational amplifier, another end of the fifth resistor is connected to an output end of the second inverting circuit, another end of the sixth resistor is connected to an output end of the first inverting circuit, and another end of the seventh resistor is connected to the third node.

5. The loop filter according to claim 4 , wherein the circuit further includes:
a first switch connected between the first node and the sixth resistor;
a second switch connected between the second node and the seventh resistor;
a third switch connected to the first node and the first input end of the operational amplifier and configured in parallel with the first capacitor; and
a fourth switch connected between the first node and the second resistor.

6. The loop filter according to claim 5 , wherein the circuit satisfies the third-order transfer function by turning on the first switch, the second switch, and the fourth switch, and turning off the third switch.

7. The loop filter according to claim 5 , wherein the circuit satisfies the second-order transfer function by turning off the first switch, the second switch, and the fourth switch, and turning on the third switch.

8. The loop filter according to claim 5 , wherein the seventh resistor is a variable resistor, and a bandwidth variation due to control of the at least one switch is adjusted by adjusting the seventh resistor.

9. The loop filter according to claim 5 , wherein at least one of the first resistor, the sixth resistor, and the seventh resistor is a variable resistor, and a loop gain is changed by adjusting the at least one of the first resistor, the sixth resistor, and the seventh resistor.

10. The loop filter according to claim 5 , wherein the fourth resistor and the fifth resistor are variable resistors, and a resonance condition is adjusted by adjusting the fourth resistor and the fifth resistor.

11. The loop filter according to claim 10 , wherein the resonance condition is maintained even when controlling the at least one switch to satisfy the third-order transfer function or the second-order transfer function.

12. A delta-sigma modulator comprising:
a loop filter for integrating and outputting a difference between an input signal and an analog signal;
a quantizer for quantizing and outputting a signal output from the loop filter; and
a digital-to-analog converter (DAC) for outputting the analog signal by digital-to-analog converting a signal output from the quantizer,
wherein the loop filter comprises:
an operational amplifier; and
a circuit including at least one capacitor, at least one resistor, and at least one switch which are connected to the operational amplifier,
wherein signal transfer characteristics of the loop filter satisfy a third-order transfer function or a second-order transfer function by turning on or off the at least one switch, and
wherein the circuit includes:
a first inverting circuit for outputting an inverted signal by inverting the input signal; and
a second inverting circuit for outputting an inverted signal by inverting a signal output from an output end of the operational amplifier.

13. The delta-sigma modulator according to claim 12 , wherein the circuit further includes a first capacitor, a second capacitor, and a third capacitor which are connected in series between a first input end of the operational amplifier and an output end of the operational amplifier.

14. The delta-sigma modulator according to claim 13 , wherein the circuit further includes:
a first resistor having one end connected to a third node to which the input signal is applied and having another end connected to the first input end of the operational amplifier;
a second resistor, a fourth resistor, and a sixth resistor each having one end connected to a first node between a first capacitor and a second capacitor; and
a third resistor, a fifth resistor, and a seventh resistor each having one end connected to a second node between the second capacitor and a third capacitor.

15. The delta-sigma modulator according to claim 14 ,
wherein each of other end of the second resistor and the third resistor is connected to a ground, another end of the fourth resistor is connected to the output end of the operational amplifier, another end of the fifth resistor is connected to an output end of the second inverting circuit, another end of the sixth resistor is connected to an output end of the first inverting circuit, and another end of the seventh resistor is connected to the third node.

16. The delta-sigma modulator according to claim 15 , wherein the circuit further includes:
a first switch connected between the first node and the sixth resistor;
a second switch connected between the second node and the seventh resistor;
a third switch connected to the first node and the first input end of the operational amplifier and configured in parallel with the first capacitor; and
a fourth switch connected between the first node and the second resistor.

17. The delta-sigma modulator according to claim 16 , wherein the circuit satisfies the third-order transfer function by turning on the first switch, the second switch, and the fourth switch, and turning off the third switch.

18. The delta-sigma modulator according to claim 16 , wherein the circuit satisfies the second-order transfer function by turning off the first switch, the second switch, and the fourth switch, and turning on the third switch.

19. A terminal including a delta-sigma modulator, wherein the delta-sigma modulator includes a loop filter comprising an operational amplifier; and a circuit including at least one capacitor, at least one resistor, and at least one switch which are connected to the operational amplifier,
wherein signal transfer characteristics of th

Assignees

• Electronics & Telecommunications Res Inst

Inventors

• Cho Young Kyun
• Park Bong Hyuk

Classifications

• H03H11/1204

  Distributed RC filters · CPC title

• H03M3/438 Primary

  the modulator having a higher order loop filter in the feedforward path · CPC title

• H03M3/422

  having one quantiser only · CPC title

• H03H11/126 Primary

  using a single operational amplifier (H03H11/1204 takes precedence; parallel-T filters H03H11/1295) · CPC title

• H03M3/394 Primary

  among different orders of the loop filter · CPC title