Speculative enumeration of bus-device-function address space

Patent metadata

Field	Value
Publication number	US-10061707-B2
Application number	US-201615079922-A
Country	US
Kind code	B2
Filing date	Mar 24, 2016
Priority date	Dec 26, 2015
Publication date	Aug 28, 2018
Grant date	Aug 28, 2018

Abstract

A first device is determined as connected to a first one of a plurality of ports of a root complex. Addresses are assigned corresponding to a first hierarchy of devices including the first device. A second device is determined as connected through a mapping portal bridge at a second one of the ports of the root complex, the second device included in another second hierarchy of devices. A mapping table is generated that corresponds to the mapping portal bridge. The mapping table defines a translation between addressing used in a first view of a configuration address space of the system and addressing used in a second view of the configuration address space. The first view includes a view of the root complex and the second view includes a view corresponding to the second hierarchy of devices, the first hierarchy of devices being addressed according to the first view.

First claim

What is claimed is:

1. At least one non-transitory machine accessible storage medium having code stored thereon, the code when executed on a machine, causes the machine to:
determine that at least one first device is connected to a first one of a plurality of ports of a root complex of a system;
assign addresses corresponding to a first hierarchy of devices comprising the first device;
determine that a second device is connected through a mapping portal bridge at a second one of the plurality of ports of the root complex, and the second device is included in another second hierarchy of devices; and
trigger generation of a mapping table corresponding to the mapping portal bridge, wherein the mapping table defines a translation between addressing used in a first view of a configuration address space of the system and addressing used in a second view of the configuration address space, the first view comprises a view of the root complex and the second view comprises a view corresponding to the second hierarchy of devices, and the addresses assigned to the first hierarchy of devices are according to the first view;
wherein the generation of the mapping table comprises a speculative mapping between the addressing used in the first view of the configuration address space and the addressing used in the second view of the configuration address space, the speculative mapping comprising:
enqueuing from an enumeration queue a first value representative of an address for the second hierarchy of devices;
identifying a second value representative of an address for the second hierarchy of devices by dequeuing the enumeration queue; and
mapping the second value to an address for the first hierarchy of devices.

2. The storage medium of claim 1 , wherein the code is further executable to assign addresses for the second hierarchy of devices corresponding to the first view of the configuration address space.

3. The storage medium of claim 2 , wherein each of the second hierarchy of devices is also assigned a respective address according to the second view of the configuration address space.

4. The storage medium of claim 1 , wherein addresses of each of the first and second views of the configuration address comprise respective bus-device-function (BDF) numbers.

5. The storage medium of claim 4 , wherein the addresses assigned according to the first view of the configuration address space are assigned to optimize assignment of bus numbers utilized in the first view.

6. The storage medium of claim 5 , wherein the addresses assigned according to the second view of the configuration address space are assigned according to a different, second address assignment scheme.

7. The storage medium of claim 6 , wherein the second scheme is agnostic to optimizing bus number assignment within the addresses of the second view.

8. The storage medium of claim 4 , wherein the configuration address space comprises a Peripheral Component Interconnect (PCI) Express (PCIe)-based configuration address space.

9. The storage medium of claim 4 , wherein a first number of bus numbers are assigned in the first view of the configuration address space, a second number of bus numbers are assigned in the second view of the configuration address space, a third number of bus numbers are assigned in the first view of the configuration address space, and a sum of the second and third numbers of bus numbers exceeds the first number.

10. The storage medium of claim 1 , wherein the mapping portal bridge is implemented in a switch device connecting the hierarchy of the devices to the root complex.

11. The storage medium of claim 1 , wherein the mapping portal bridge is implemented in the second port.

12. The storage medium of claim 1 , wherein the mapping portal bridge is to use the mapping table to assist communication between the second hierarchy of devices and the root complex.

13. The storage medium of claim 1 , wherein the code is further executable to discover devices in each of the first and second device hierarchies according to a respective search algorithm.

14. The storage medium of claim 13 , wherein the search algorithm comprises a depth-first search.

15. The storage medium of claim 13 , wherein the search algorithm comprises a breadth-first search.

16. The storage medium of claim 13 , wherein the search algorithm used to discover devices in the first hierarchy is different from the search algorithm used to discover devices in the second hierarchy.

17. The storage medium of claim 13 , wherein the search algorithm used to discover devices in the first hierarchy is the same as the search algorithm used to discover devices in the second hierarchy.

18. The storage medium of claim 1 , wherein at least a portion of the addresses in the first view of the configuration address space are reserved for hot plugging.

19. A method comprising:
determining that at least one first device is connected to a first one of a plurality of ports of a root complex of a system;
assigning addresses corresponding to a first hierarchy of devices comprising the first device;
determining that a second device is connected through a mapping portal bridge at a second one of the plurality of ports of the root complex, and the second device is included in another second hierarchy of devices; and
triggering generation of a mapping table corresponding to the mapping portal bridge, wherein the mapping table defines a translation between addressing used in a first view of a configuration address space of the system and addressing used in a second view of the configuration address space, the first view comprises a view of the root complex and the second view comprises a view corresponding to the second hierarchy of devices, and the addresses assigned to the first hierarchy of devices are according to the first view;
wherein the generation of the mapping table comprises a speculative mapping between the addressing used in the first view of the configuration address space and the addressing used in the second view of the configuration address space, the speculative mapping comprising:
enqueuing from an enumeration queue a first value representative of an address for the second hierarchy of devices;
identifying a second value representative of an address for the second hierarchy of devices by dequeuing the enumeration queue; and

mapping the second value to an address for the first hierarchy of devices.

20. A system comprising:
a root complex comprising a plurality of ports to couple to a plurality of hierarchies of devices;
system software, executable by a processor, to:
determine that at least one first device is connected to a first one of the plurality of ports;
assign addresses corresponding to a first hierarchy of devices comprising the first device;
determine that a second device is connected through a mapping portal bridge at a second one of the plurality of ports of the root complex, and the second device is included in another second hierarchy of devices; and
generate a mapping table corresponding to the mapping portal bridge, wherein the mapping table defines a translation between addressing used in a first view of a configuration address space of the system and addressing used in a second view of the configuration address space, the first view comprises a view of the root complex and the second view comprises a view corresponding to the second hierarchy of devices, and the addresses assigned to the first hierarchy of devices are according to the first view;

wherein the gener

Assignees

• Intel Corp

Inventors

• Kutuva Rabindranath Shanthanand
• Harriman David J
• Sethi Prashant
• Kothandan Vijayalakshmi

Classifications

• G06F2212/65

  Details of virtual memory and virtual address translation · CPC title

• G06F2212/1044

  Space efficiency improvement · CPC title

• G06F13/404

  with address mapping · CPC title

• G06F2213/0026

  PCI express · CPC title

• G06F2212/657

  Virtual address space management · CPC title