Vertical hall effect sensor
US-9312473-B2 · Apr 12, 2016 · US
Semiconductor device
US10060991B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10060991-B2 |
| Application number | US-201715814986-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 16, 2017 |
| Priority date | Jan 18, 2017 |
| Publication date | Aug 28, 2018 |
| Grant date | Aug 28, 2018 |
How to read this patent
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
- Title
What the patent document calls the invention.
- Abstract
A short plain-language summary of the technical disclosure.
- Assignees and inventors
Who owns or filed the patent and who is credited as inventor.
- Key dates
Filing, priority, publication, and grant dates set the timeline.
- First independent claim
The legal scope of protection — read this for what is actually claimed.
- CPC / IPC classifications
Technology tags used to group this patent with similar filings.
- Citations and related patents
Prior art links and similar publications in this corpus.
Abstract
Official abstract text for this publication.
Provided is a semiconductor device including a vertical Hall element with improved sensitivity. The vertical Hall element includes: a semiconductor layer of a second conductivity type formed on the semiconductor substrate; a plurality of electrodes aligned along a straight line on a surface of the semiconductor layer and being impurity regions of the second conductivity type being higher in concentration than the semiconductor layer; a plurality of electrode isolation diffusion layers of the first conductivity type respectively arranged between adjacent electrodes of the plurality of electrodes on the surface of the semiconductor layer to isolate the plurality of electrodes from one another; and embedded layers being an impurity region of the second conductivity type which is higher in concentration than the semiconductor layer and being respectively provided substantially right below one of the plurality of electrode isolation diffusion layers between the semiconductor substrate and the semiconductor layer.
First claim
Opening claim text (preview).
What is claimed is: 1. A semiconductor device, comprising: a semiconductor substrate of a first conductivity type; and a vertical Hall element provided on the semiconductor substrate, the vertical Hall element including: a semiconductor layer of a second conductivity type formed on the semiconductor substrate; a plurality of electrodes aligned along a straight line on a surface of the semiconductor layer, and formed from impurity regions of the second conductivity type having a concentration higher than that of the semiconductor layer, a plurality of electrode isolation diffusion layers of the first conductivity type respectively arranged between adjacent electrodes of the plurality of electrodes on the surface of the semiconductor layer to isolate the plurality of electrodes from one another; and embedded layers formed from an impurity region of the second conductivity type having a concentration higher than that of the semiconductor layer, and respectively provided substantially right below one of the plurality of electrode isolation diffusion layers between the semiconductor substrate and the semiconductor layer. 2. The semiconductor device according to claim 1 , wherein none of the embedded layers are provided right below the plurality of electrodes. 3. The semiconductor device according to claim 1 , wherein the semiconductor layer includes an epitaxial layer. 4. The semiconductor device according to claim 2 , wherein the semiconductor layer includes an epitaxial layer. 5. The semiconductor device according to claim 1 , wherein the surface of the semiconductor layer and surfaces of the plurality of electrode isolation diffusion layers are covered with an insulating film, except for regions in which the plurality of electrodes are formed. 6. The semiconductor device according to claim 2 , wherein the surface of the semiconductor layer and surfaces of the plurality of electrode isolation diffusion layers are covered with an insulating film, except for regions in which the plurality of electrodes are formed. 7. The semiconductor device according to claim 3 , wherein the surface of the semiconductor layer and surfaces of the plurality of electrode isolation diffusion layers are covered with an insulating film, except for regions in which the plurality of electrodes are formed. 8. The semiconductor device according to claim 1 , wherein a number of the plurality of electrodes is at least three. 9. The semiconductor device according to claim 2 , wherein a number of the plurality of electrodes is at least three. 10. The semiconductor device according to claim 3 , wherein a number of the plurality of electrodes is at least three. 11. The semiconductor device according to claim 4 , wherein a number of the plurality of electrodes is at least three.
Assignees
Inventors
Classifications
- G01R33/077Primary
Vertical Hall-effect devices · CPC title
Electricity · mapped topic
Electricity · mapped topic
Hall effect devices · CPC title
- H10N52/101Primary
Semiconductor Hall-effect devices · CPC title
Patent family
Related publications grouped by family.
External sources
Frequently asked questions
Answers are generated from the same data shown on this page.
- What does patent US10060991B2 cover?
- Provided is a semiconductor device including a vertical Hall element with improved sensitivity. The vertical Hall element includes: a semiconductor layer of a second conductivity type formed on the semiconductor substrate; a plurality of electrodes aligned along a straight line on a surface of the semiconductor layer and being impurity regions of the second conductivity type being higher in con…
- Who is the assignee on this patent?
- Sii Semiconductor Corp, Ablic Inc
- What technology area does this patent fall under?
- Primary CPC classification G01R33/077. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Aug 28 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).