Time-sequenced multi-device address assignment

Patent metadata

Field	Value
Publication number	US-10057209-B2
Application number	US-201615221973-A
Country	US
Kind code	B2
Filing date	Jul 28, 2016
Priority date	Jul 28, 2016
Publication date	Aug 21, 2018
Grant date	Aug 21, 2018

Abstract

Time-sequenced multi-device address assignment is provided. In this regard, an electronic device includes a plurality of client devices that are daisy-chained to a host interface port in a host controller by a reset line. The host controller is configured to assert the reset line to reset the daisy-chained client devices and then sequentially de-assert the reset line for the daisy-chained client devices according to a determined time sequence. Accordingly, the host controller assigns a unique client device address to each of the client devices when the reset line is de-asserted for the client device. By daisy-chaining the client devices via the reset line and sequentially assigning the unique client device addresses based on the determined time sequence, it is possible to assign the unique client device addresses from a single host interface port, thus reducing design complexity, footprint, and power consumption in the electronic device.

First claim

What is claimed is:

1. An electronic device, comprising:
a host controller comprising a host interface port;
a plurality of client devices communicatively coupled to the host interface port via a shared bus; and
a reset line configured to daisy-chain the plurality of client devices to the host interface port, wherein:
a first daisy-chained client device among the plurality of daisy-chained client devices is disposed closest to the host interface port; and
a last daisy-chained client device among the plurality of daisy-chained client devices is disposed farthest from the host interface port;

wherein the host controller is configured to:
assert the reset line to reset the plurality of daisy-chained client devices;
de-assert the reset line for the plurality of daisy-chained client devices sequentially at a plurality of starting points, respectively from the first daisy-chained client device to the last daisy-chained client device according to a determined time sequence, the determined time sequence comprising a plurality of address assignment time windows that starts at the plurality of starting points and ends at a plurality of ending points, respectively; and
assign a plurality of unique client device addresses to the plurality of daisy-chained client devices between the plurality of starting points and the plurality of ending points, respectively when the reset line is de-asserted for the plurality of daisy-chained client devices, respectively.

2. The electronic device of claim 1 , wherein the host controller is further configured to:
assert the reset line to reset the plurality of daisy-chained client devices by coupling the reset line to a ground voltage; and
de-assert the reset line for the plurality of daisy-chained client devices by sequentially coupling the plurality of daisy-chained client devices to a voltage higher than the ground voltage according to the determined time sequence.

3. The electronic device of claim 1 , wherein the host controller is further configured to assign each of the plurality of unique client device addresses according to a shortest address assignment time window among the plurality of address assignment time windows.

4. The electronic device of claim 1 , wherein:
the reset line comprises a plurality of resistor-capacitor (RC) circuits disposed in a serial arrangement; and
the plurality of daisy-chained client devices are coupled to the reset line via the plurality of RC circuits, respectively.

5. The electronic device of claim 4 , wherein the plurality of RC circuits comprises a plurality of RC time constants that define the plurality of address assignment time windows, respectively.

6. The electronic device of claim 5 , wherein the plurality of RC time constants defines the plurality of starting points in the plurality of address assignment time windows, respectively.

7. The electronic device of claim 5 , wherein a cumulative RC time constant of the plurality of RC circuits defines an address assignment delay budget in the host controller.

8. The electronic device of claim 1 , wherein the host controller is further configured to support the reset line via a reset pin in the host interface port.

9. The electronic device of claim 1 , wherein the host controller is further configured to assign the plurality of unique client device addresses using a common initial address.

10. The electronic device of claim 1 , wherein:
the host interface port is comprised of an inter-integrated circuit (I2C) host interface port; and
the plurality of client devices is comprised of a plurality of I2C peripheral devices.

11. The electronic device of claim 1 , wherein:
the host interface port is comprised of a radio frequency front-end (RFFE) host interface port; and
the plurality of client devices is comprised of a plurality of RFFE peripheral devices.

12. An electronic device, comprising:
a means for controlling a host comprising a host interface port;
a plurality of client devices communicatively coupled to the host interface port via a shared bus; and
a means for resetting client devices configured to daisy-chain the plurality of client devices to the host interface port, wherein:
a first daisy-chained client device among the plurality of daisy-chained client devices is disposed closest to the host interface port; and
a last daisy-chained client device among the plurality of daisy-chained client devices is disposed farthest from the host interface port;

wherein the means for controlling the host is configured to:
assert the means for resetting client devices to reset the plurality of daisy-chained client devices;
de-assert the means for resetting client devices for the plurality of daisy-chained client devices sequentially at a plurality of starting points, respectively from the first daisy-chained client device to the last daisy-chained client device according to a determined time sequence, the determined time sequence comprising a plurality of address assignment time windows that starts at the plurality of starting points and ends at a plurality of ending points, respectively; and
assign a plurality of unique client device addresses to the plurality of daisy-chained client devices between the plurality of starting points and the plurality of ending points, respectively when the means for resetting client devices is de-asserted for the plurality of daisy-chained client devices, respectively.

13. A method for assigning a plurality of unique client device addresses to a plurality of client devices, comprising:
daisy-chaining the plurality of client devices to a host interface port via a reset line;
asserting the reset line to reset the plurality of daisy-chained client devices;
de-asserting the reset line for the plurality of daisy-chained client devices sequentially from a first daisy-chained client device to a last daisy-chained client device according to a determined time sequence;
defining a plurality of address assignment time windows for the determined time sequence, wherein the plurality of address assignment time windows starts at a plurality of starting points and ends at a plurality of ending points, respectively;
assigning the plurality of unique client device addresses to the plurality of daisy-chained client devices when the reset line is de-asserted for the plurality of daisy-chained client devices, respectively;
disposing a plurality of resistor-capacitor (RC) circuits in the reset line in a serial arrangement; and
coupling the plurality of daisy-chained client devices to the reset line via the plurality of RC circuits, respectively.

14. The method of claim 13 , further comprising:
asserting the reset line to reset the plurality of daisy-chained client devices by coupling the reset line to a ground voltage; and
de-asserting the reset line for the plurality of daisy-chained client devices by sequentially coupling the plurality of daisy-chained client devices to a voltage higher than the ground voltage according to the determined time sequence.

15. The method of claim 13 , further comprising:
de-asserting the reset line for the plurality of daisy-chained client devices sequentially at the plurality of starting points, respectively; and
assigning the plurality of unique client device addresses to the plurality of daisy-chained client devices between the plurality of starting points and the plurality of ending points, respectively.

16. The method of claim 15 , further comprising assigning each of the plurality of unique client device addresses according to a shortest address assignment time window among the plurality o

Assignees

• Qualcomm Inc

Inventors

• Mishra Lalan Jee
• Pitigoi-Aron Radu
• Wietfeldt Richard Dominic

Classifications

• H04L12/40013

  Details regarding a bus controller · CPC title

• H04W52/0235

  where the received signal is a power saving command · CPC title

• H04L61/2061 Primary

  Electricity · mapped topic

• G06F13/37 Primary

  using a physical-position-dependent priority, e.g. daisy chain, round robin or token passing · CPC title

• H04W72/1263

  Mapping of traffic onto schedule, e.g. scheduled allocation or multiplexing of flows · CPC title