Multilayer printed capacitors

Patent metadata

Field	Value
Publication number	US-10050351-B2
Application number	US-201514743770-A
Country	US
Kind code	B2
Filing date	Jun 18, 2015
Priority date	Jun 18, 2014
Publication date	Aug 14, 2018
Grant date	Aug 14, 2018

Abstract

Phased-array antenna systems can be constructed using transfer printed active components. Phased-array antenna systems benefit from a large number of radiating elements (e.g., more radiating elements can form sharper, narrower beams (higher gain)). As the number of radiating elements increases, the size of the part and the cost of assembly increases. High throughput micro assembly (e.g. by micro-transfer printing) mitigates costs associated with high part-count. Micro assembly is advantaged over monolithic approaches that form multiple radiating elements on a semiconductor wafer because micro assembly uses less semiconductor material to provide the active components that are necessary for the array. The density of active components on the phased-array antenna system is small. Micro assembly provides a way to efficiently use semiconductor material on a phased array, reducing the amount of non-active semiconductor area (e.g., the area on the semiconductor material that does not include transistors, diodes, or other active components).

First claim

What is claimed:

1. A device comprising:
a destination substrate; and
a multilayer structure disposed on the destination substrate, wherein the multilayer structure comprises a plurality of printed capacitors stacked on top of each other with an offset between each capacitor along at least one edge of the capacitors.

2. The device of claim 1 , wherein the offset is in one dimension.

3. The device of claim 1 , wherein the offset is in two dimensions.

4. The device of claim 1 , wherein the offset is such that a portion of a top surface of each printed capacitor of the plurality of printed capacitors is exposed.

5. The device of claim 1 , wherein each capacitor of the plurality of capacitors has a capacitance between 100 nF/mm 2 and 400 nF/mm 2 .

6. The device of claim 1 , wherein each capacitor of the plurality of capacitors has at least one of a thickness, width, and length of from 1 μm to 10 μm, 10 μm to 30 μm, 30 μm to 50 μm, 50 μm to 100 μm, or 100 μm to 200 μm.

7. The device of claim 1 , wherein each of the plurality of capacitors are a same shape and size.

8. The device of claim 1 , wherein the plurality of printed capacitors are connected in at least one of parallel and series.

9. The device of claim 1 , wherein the destination substrate comprises a member selected from the group consisting of polymer, plastic, resin, polyimide, PEN, PET, metal, metal foil, glass, a semiconductor, and sapphire.

10. The device of claim 1 , wherein the destination substrate has a transparency greater than or equal to 50% for visible light.

11. The device of claim 1 , wherein each printed capacitor of the plurality of printed capacitors has a thin metal-insulator-metal structure.

12. The device of claim 11 , wherein the thin metal-insulator-metal structure has a thickness of from 1 μm to 10 μm, 10 μm to 30 μm, 30 μm to 50 μm, or 50 μm to 100 μm.

13. The device of claim 1 , wherein the plurality of printed capacitors comprises a first printed capacitor and a second printed capacitor and the first printed capacitor and the second printed capacitor are electrically connected via thin-film wafer-level interconnections.

14. The device of claim 1 , wherein the plurality of printed capacitors comprises a first printed capacitor and a second printed capacitor and the first printed capacitor and the second printed capacitor are electrically connected in parallel.

15. The device of claim 1 , wherein the plurality of printed capacitors comprises a first printed capacitor and a second printed capacitor and the first printed capacitor and the second printed capacitor are electrically connected in series.

16. The device of claim 1 , wherein the plurality of printed capacitors comprises a first printed capacitor and the first printed capacitor is electrically connected via thin-film wafer-level interconnections.

17. The device of claim 1 , wherein the plurality of printed capacitors comprises a first printed capacitor, an adhesive layer is disposed on the destination substrate, and the first capacitor is in contact with the adhesive layer.

18. The device of claim 1 , wherein one or more printed capacitors of the plurality of printed capacitors comprises a broken tether.

19. A wafer of printable capacitors, the wafer comprising:
a source substrate;
a first sacrificial layer disposed on a process side of the source substrate;
a first set of printable capacitors disposed on the first sacrificial layer;
a second sacrificial layer disposed on the first set of printable capacitors; and
a second set of printable capacitors disposed on the second sacrificial layer.

Assignees

• X Celeprint Ltd

Inventors

• Bower Christopher
• Meitl Matthew

Classifications

• H10D84/212

  of only capacitors · CPC title

• H10W72/884

  Die-attach connectors and bond wires · CPC title

• H10W90/732

  between stacked chips · CPC title

• H10P72/7434

  used in a transfer process involving at least two transfer steps, i.e. including an intermediate handle substrate · CPC title

• H10P72/7428

  used to support diced chips prior to mounting · CPC title